MOSFET integrated circuit with uniformly thin silicide layer and methods for its manufacture
    132.
    发明授权
    MOSFET integrated circuit with uniformly thin silicide layer and methods for its manufacture 有权
    具有均匀薄的硅化物层的MOSFET集成电路及其制造方法

    公开(公告)号:US08652963B2

    公开(公告)日:2014-02-18

    申请号:US13237732

    申请日:2011-09-20

    CPC classification number: H01L29/665 H01L21/28518 H01L29/6659 H01L29/7833

    Abstract: An MOSFET device having a Silicide layer of uniform thickness, and methods for its fabrication, are provided. One such method involves depositing a metal layer over wide and narrow contact trenches on the surface of a silicon semiconductor substrate. Upon formation of a uniformly thin amorphous intermixed alloy layer at the metal/silicon interface, the excess (unreacted) metal is removed. The device is annealed to facilitate the formation of a thin silicide layer on the substrate surface which exhibits uniform thickness at the bottoms of both wide and narrow contact trenches.

    Abstract translation: 提供具有均匀厚度的硅化物层的MOSFET器件及其制造方法。 一种这样的方法包括在硅半导体衬底的表面上的宽且窄的接触沟槽上沉积金属层。 在金属/硅界面处形成均匀薄的无定形混合合金层时,除去过量的(未反应的)金属。 该器件被退火以促进在衬底表面上形成薄的硅化物层,其在宽和窄接触沟槽的底部显示均匀的厚度。

    WATERMARKING IMAGE BLOCK DIVISION METHOD AND DEVICE FOR WESTERN LANGUAGE WATERMARKING PROCESSING
    133.
    发明申请
    WATERMARKING IMAGE BLOCK DIVISION METHOD AND DEVICE FOR WESTERN LANGUAGE WATERMARKING PROCESSING 有权
    WATERMARKING图像块分割方法和西语言水印处理装置

    公开(公告)号:US20140003649A1

    公开(公告)日:2014-01-02

    申请号:US13997258

    申请日:2011-12-23

    Abstract: The application provides a method for partitioning a watermark image with western language characters, comprising: partitioning a western language characters image along rows and columns to form a plurality of character image blocks; identifying valid character image blocks from the formed character image blocks; counting sizes of the valid character image blocks to determine if the image corresponds to a document with a large font size or a document with a small font size; dividing words in the image into a plurality of groups, wherein each divided group in the document with large font size has different numbers of words from that with small font size; and dividing equally the divided word groups into multiple portions corresponding to watermark image blocks. The application further provides a device for partitioning a watermark image with western language characters. The operability of watermark embedding process can be ensured through the above technical solution.

    Abstract translation: 该应用程序提供了一种用于用西方语言字符分割水印图像的方法,包括:沿着行和列划分西方语言字符图像以形成多个字符图像块; 从形成的字符图像块中识别有效的字符图像块; 计算有效字符图像块的大小,以确定图像是否对应于具有较大字体大小的文档或具有小字体大小的文档; 将图像中的单词划分成多个组,其中具有大字体大小的文档中的每个划分组具有与具有小字体尺寸的单词不同的字数; 并将划分的字组分成相当于水印图像块的多个部分。 该应用还提供了一种用于用西语字符分割水印图像的设备。 通过上述技术方案可以确保水印嵌入过程的可操作性。

    Accelerometer
    135.
    发明授权
    Accelerometer 有权
    加速度计

    公开(公告)号:US08413511B2

    公开(公告)日:2013-04-09

    申请号:US13015987

    申请日:2011-01-28

    Abstract: A accelerometer includes a substrate define a stationary electrode thereon, a first moveable mass defining a conductive-layer thereon facing the stationary electrode, a plurality of first elastic elements coupled with a peripheral side of the first moveable mass, a first fixed element surrounding the first moveable mass and fixedly attached to the substrate, a plurality of first fixed electrodes extending outwardly from the first fixed element, a second moveable mass surrounding the first fixed electrodes, a plurality of first moveable electrodes extending inwardly from the second moveable mass toward the first fixed element and parallel to the first fixed electrodes, respectively, a plurality of second elastic elements coupled with a peripheral side of the second moveable mass, and a second fixed element surrounding the second moveable mass and fixedly attached to the substrate.

    Abstract translation: 加速度计包括在其上限定固定电极的基板,限定其面向固定电极的导电层的第一可移动质量块,与第一可移动质量块的周边连接的多个第一弹性元件,围绕第一 可移动的质量并且固定地附接到基板,从第一固定元件向外延伸的多个第一固定电极,围绕第一固定电极的第二可移动质量;从第二可移动质量向内朝向第一固定 并且与第一固定电极平行的多个第二弹性元件分别与第二可移动质量体的周边连接,第二固定元件围绕第二可移动质量块并且固定地附着在基底上。

    Methods and systems for scanning and processing an image using the error diffusion screening technology
    136.
    发明授权
    Methods and systems for scanning and processing an image using the error diffusion screening technology 有权
    使用误差扩散筛选技术扫描和处理图像的方法和系统

    公开(公告)号:US08411310B2

    公开(公告)日:2013-04-02

    申请号:US12438533

    申请日:2007-08-22

    Inventor: Bin Yang Haifeng Li

    CPC classification number: H04N1/4052

    Abstract: Disclosed is a method for scanning and processing an image using the error diffusion screening technology, comprising: (1) scanning each pixel Mi of an nth line in an original image one by one and then storing a scanning result of the pixel Mi to an ith storage location; and (2) processing the stored result of the pixel Mi by using error diffusion and scanning pixels of an n+1th line in the original image until all pixels of the nth line have been processed and all pixels in the n+1th line have been scanned and stored, wherein once processing for the pixel Mi is completed, a scanning result of a pixel of the n+1th line is stored to the ith storage location previously occupied by the pixel Mi. Based on the method, the capacity for storing is only required to be able to store the data of one line in an image in the scanning direction, which saves the storage for bidirectional scanning. The method can optimize the hardware used to implement error diffusion and improve the operating efficiency. Also disclosed is a system for achieving the method.

    Abstract translation: 公开了一种使用误差扩散筛选技术对图像进行扫描和处理的方法,包括:(1)逐个扫描原始图像中的第n行的每个像素Mi,然后将像素Mi的扫描结果存储到第i个 存储位置; 和(2)通过使用原始图像中的第n + 1行的误差扩散和扫描像素来处理像素Mi的存储结果,直到第n行的所有像素都被处理并且第n + 1行中的所有像素已被 扫描并存储,其中一旦针对像素Mi的处理完成,将第n + 1行的像素的扫描结果存储到先前由像素Mi占据的第i个存储位置。 基于该方法,存储容量只需要能够将扫描方向上的一行数据存储在图像中,从而节省用于双向扫描的存储。 该方法可以优化用于实现误差扩散的硬件,提高运行效率。 还公开了一种用于实现该方法的系统。

    Metal-semiconductor intermixed regions
    138.
    发明授权
    Metal-semiconductor intermixed regions 有权
    金属半导体混合区域

    公开(公告)号:US08278200B2

    公开(公告)日:2012-10-02

    申请号:US13012043

    申请日:2011-01-24

    CPC classification number: H01L21/28518

    Abstract: In one exemplary embodiment, a program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine for performing operations, said operations including: depositing a first layer having a first metal on a surface of a semiconductor structure, where depositing the first layer creates a first intermix region at an interface of the first layer and the semiconductor structure; removing a portion of the deposited first layer to expose the first intermix region; depositing a second layer having a second metal on the first intermix region, where depositing the second layer creates a second intermix region at an interface of the second layer and the first intermix region; removing a portion of the deposited second layer to expose the second intermix region; and performing at least one anneal on the semiconductor structure.

    Abstract translation: 在一个示例性实施例中,一种可由机器读取的程序存储设备,其有形地体现了可由机器执行的用于执行操作的指令程序,所述操作包括:在半导体结构的表面上沉积具有第一金属的第一层, 第一层在第一层和半导体结构的界面处形成第一混合区; 去除沉积的第一层的一部分以暴露第一混合区; 在所述第一混合区域上沉积具有第二金属的第二层,其中沉积所述第二层在所述第二层和所述第一混合区的界面处产生第二混合区; 去除沉积的第二层的一部分以暴露第二混合区; 以及在所述半导体结构上执行至少一个退火。

    Method for forming an SOI schottky source/drain device to control encroachment and delamination of silicide
    140.
    发明授权
    Method for forming an SOI schottky source/drain device to control encroachment and delamination of silicide 有权
    用于形成SOI肖特基源极/漏极器件以控制硅化物侵蚀和分层的方法

    公开(公告)号:US08168503B2

    公开(公告)日:2012-05-01

    申请号:US12726736

    申请日:2010-03-18

    CPC classification number: H01L29/7839 H01L29/78654

    Abstract: A method of fabricating a Schottky field effect transistor is provided that includes providing a substrate having at least a first semiconductor layer overlying a dielectric layer, wherein the first semiconductor layer has a thickness of less than 10.0 nm. A gate structure is formed directly on the first semiconductor layer. A raised semiconductor material is selectively formed on the first semiconductor layer adjacent to the gate structure. The raised semiconductor material is converted into Schottky source and drain regions composed of a metal semiconductor alloy. A non-reacted semiconductor material is present between the Schottky source and drain regions and the dielectric layer.

    Abstract translation: 提供一种制造肖特基场效应晶体管的方法,其包括提供具有覆盖在电介质层上的至少第一半导体层的衬底,其中第一半导体层具有小于10.0nm的厚度。 栅极结构直接形成在第一半导体层上。 凸起的半导体材料选择性地形成在与栅极结构相邻的第一半导体层上。 凸起的半导体材料被转换成由金属半导体合金构成的肖特基源极和漏极区域。 在肖特基源极和漏极区域与电介质层之间存在未反应的半导体材料。

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