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公开(公告)号：US20140244926A1
公开(公告)日：2014-08-28
申请号：US13777825
申请日：2013-02-26
Applicant: LSI CORPORATION
Inventor： Shaohua Yang , Shu Li , Bruce A. Wilson
IPC: G06F12/06
CPC classification number: G11B5/012 , G11B20/10527 , G11B20/1217 , G11B20/1866
Abstract: The present disclosure is directed to a method for managing a memory. The method includes the step of receiving data, the data including a plurality of sectors. The method also includes the step of dividing each sector of the plurality of sectors into a plurality of data units. A further step of the method involves interleaving the plurality of data units to yield a plurality of interleaved data units. The method also includes the step of writing the plurality of interleaved data units to a disk. An additional step of the method is to de-spread the plurality of interleaved data units to yield at least one sector of the plurality of sectors.
Abstract translation: 本公开涉及一种用于管理存储器的方法。 该方法包括接收数据的步骤，该数据包括多个扇区。 该方法还包括将多个扇区中的每个扇区划分为多个数据单元的步骤。 该方法的另一步骤涉及交织多个数据单元以产生多个交错数据单元。 该方法还包括将多个交错数据单元写入盘的步骤。 该方法的附加步骤是解扩展多个交错数据单元以产生多个扇区中的至少一个扇区。
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公开(公告)号：US20140237329A1
公开(公告)日：2014-08-21
申请号：US13777937
申请日：2013-02-26
Applicant: LSI CORPORATION
Inventor： Rui Cao , Yu Kou , Shaohua Yang
IPC: G06F11/07
CPC classification number: G06F11/34 , G11B5/59616 , G11B20/10 , G11B20/1403 , G11B27/00 , H04L1/00
Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for detecting a sync mark with a ratio-adjustable detection system.
Abstract translation: 用于数据处理的系统，方法，设备，电路，更具体地涉及用比率可调检测系统检测同步标记的系统和方法。
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公开(公告)号：US20140237314A1
公开(公告)日：2014-08-21
申请号：US13770008
申请日：2013-02-19
Applicant: LSI CORPORATION
Inventor： Shaohua Yang , Fan Zhang , Chung-Li Wang , Shu Li
IPC: H03M13/05
CPC classification number: H03M13/1122 , G11B20/1833 , H03M13/1128 , H03M13/114 , H03M13/1142 , H03M13/6331 , H03M13/6343 , H03M13/658
Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding including skipping one or more codeword blocks in the data decoding process.
Abstract translation: 本发明涉及用于数据处理的系统和方法，更具体地涉及用于执行数据解码的系统和方法，包括在数据解码过程中跳过一个或多个码字块。
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公开(公告)号：US08810948B2
公开(公告)日：2014-08-19
申请号：US13722296
申请日：2012-12-20
Applicant: LSI Corporation
Inventor： Shaohua Yang , Jin Lu , Weijun Tan
CPC classification number: G11B20/10 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to: equalize an oversampled digital data signal to determine an equalized digital data signal, filter the equalized digital data signal, determine a hard decision and reliability of the filtered digital data signal, and decode the filtered digital data signal based at least in part on the hard decision and reliability. The oversampled digital data signal comprises a first set of sampled digital data and a corresponding second set of sampled digital data, each of the samples in the first set of sampled digital data being offset from a corresponding one of the sample in the second set of sampled digital data by a phase difference.
Abstract translation: 一种装置包括读通道电路和与读通道电路相关联的信号处理电路。 信号处理电路被配置为：对过采样的数字数据信号进行均衡以确定均衡的数字数据信号，滤除均衡的数字数据信号，确定滤波数字数据信号的硬判决和可靠性，以及基于滤波的数字数据信号进行解码 至少部分在于硬的决定和可靠性。 过采样的数字数据信号包括第一组采样数字数据和相应的第二组采样数字数据，第一组采样数字数据中的每个样本与第二组采样数据中的样本中相应的一个采样偏移 数字数据由相位差组成。
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135.发明申请公开(公告)号：US20140229806A1
公开(公告)日：2014-08-14
申请号：US13766891
申请日：2013-02-14
Applicant: LSI CORPORATION
Inventor： Shu Li , Shaohua Yang , Zongwang Li , Yang Han
CPC classification number: H03M13/13 , G11B20/1833 , G11B2020/185 , H03M13/1117 , H03M13/1134 , H03M13/1137 , H03M13/2957 , H03M13/2975 , H03M13/2978 , H03M13/6325 , H03M13/6343 , H03M13/6502 , H03M13/6561 , H04L1/005 , H04L1/0052 , H04L1/0066
Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding.
Abstract translation: 本发明涉及用于数据处理的系统和方法，更具体地涉及用于执行数据解码的系统和方法。
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Patent Agency Ranking
136.发明申请Systems and Methods for Accommodating End of Transfer Request in a Data Storage Device 审中-公开用于容纳数据存储设备中的传输请求结束的系统和方法公开(公告)号：US20140229700A1
公开(公告)日：2014-08-14
申请号：US13766857
申请日：2013-02-14
Applicant: LSI CORPORATION
Inventor： Shaohua Yang , Fan Zhang , Kaitlyn T. Nguyen
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0659 , G06F3/0676
Abstract: Systems and methods for data processing particularly related addressing latency concerns in relation to data processing.
Abstract translation: 用于数据处理的系统和方法特别涉及解决与数据处理相关的延迟问题。
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公开(公告)号：US20140211337A1
公开(公告)日：2014-07-31
申请号：US14243107
申请日：2014-04-02
Applicant: LSI Corporation
Inventor： Weijun Tan , Fan Zhang , Shaohua Yang
CPC classification number: G06F11/10 , G11B20/10009 , G11B20/10287 , G11B20/10296 , G11B20/1816 , G11B20/1883
Abstract: Various embodiments of the present invention provide systems and methods for media defect detection.
Abstract translation: 本发明的各种实施例提供了用于介质缺陷检测的系统和方法。
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公开(公告)号：US20140177087A1
公开(公告)日：2014-06-26
申请号：US13724962
申请日：2012-12-21
Applicant: LSI CORPORATION
Inventor： Jin Lu , Weijun Tan , Shaohua Yang
IPC: G11B20/10
CPC classification number: G11B20/10287 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry. The signal processing circuitry comprises: an equalizer configured to combine an output of two or more component filters into a single equalized data signal; a detector with an input coupled to an output of the equalizer configured to determine a set of soft outputs, hard decision information and reliability indicators of the single equalized data signal; a decoder with an input coupled to an output of the detector configured to perform an iterative decoding process using the set of soft outputs, hard decision information and reliability indicators to determine a decoded data signal; and a multiplexer with a first input coupled to an output of the decoder, a second input coupled to an output of the detector, and an output coupled to an input of the equalizer. The hard decision information is used to train the equalizer.
Abstract translation: 一种装置包括读通道电路和相关的信号处理电路。 信号处理电路包括：均衡器，被配置为将两个或更多个分量滤波器的输出组合成单个均衡数据信号; 具有耦合到所述均衡器的输出的输入的检测器，被配置为确定所述单个均衡数据信号的一组软输出，硬判决信息和可靠性指示符; 解码器，具有耦合到所述检测器的输出的输入，被配置为使用所述一组软输出执行迭代解码处理，硬判决信息和可靠性指示符，以确定解码的数据信号; 以及多路复用器，其具有耦合到解码器的输出的第一输入，耦合到检测器的输出的第二输入和耦合到均衡器的输入的输出。 硬判决信息用于训练均衡器。
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公开(公告)号：US20140177082A1
公开(公告)日：2014-06-26
申请号：US13722296
申请日：2012-12-20
Applicant: LSI CORPORATION
Inventor： Shaohua Yang , Jin Lu , Weijun Tan
IPC: G11B20/10
CPC classification number: G11B20/10 , G11B20/10046
Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to: equalize an oversampled digital data signal to determine an equalized digital data signal, filter the equalized digital data signal, determine a hard decision and reliability of the filtered digital data signal, and decode the filtered digital data signal based at least in part on the hard decision and reliability. The oversampled digital data signal comprises a first set of sampled digital data and a corresponding second set of sampled digital data, each of the samples in the first set of sampled digital data being offset from a corresponding one of the sample in the second set of sampled digital data by a phase difference.
Abstract translation: 一种装置包括读通道电路和与读通道电路相关联的信号处理电路。 信号处理电路被配置为：对过采样的数字数据信号进行均衡以确定均衡的数字数据信号，滤除均衡的数字数据信号，确定滤波数字数据信号的硬判决和可靠性，以及基于滤波的数字数据信号进行解码 至少部分在于硬的决定和可靠性。 过采样的数字数据信号包括第一组采样数字数据和相应的第二组采样数字数据，第一组采样数字数据中的每个样本与第二组采样数据中的样本中相应的一个采样偏移 数字数据由相位差组成。
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公开(公告)号：US20140143289A1
公开(公告)日：2014-05-22
申请号：US13873224
申请日：2013-04-30
Applicant: LSI CORPORATION
Inventor： Razmik Karabed , Shaohua Yang , Wu Chang , Victor Krachkovsky , Zhiwei Wu
IPC: H03M7/30
CPC classification number: H03M7/30
Abstract: Various embodiments of the present invention provide apparatuses and methods for encoding and decoding data for constrained systems with reduced or eliminated need for hardware and time intensive arithmetic operations such as multiplication and division.
Abstract translation: 本发明的各种实施例提供了用于对受限制系统的数据进行编码和解码的装置和方法，其中减少或消除了对硬件和诸如乘法和除法之类的时间密集算术运算的需求。
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