公开(公告)号：US06704277B1

公开(公告)日：2004-03-09

申请号：US09474564

申请日：1999-12-29

申请人： Sanjay Dabral ,  Ming Zeng ,  Chung-Wai Yue

发明人： Sanjay Dabral ,  Ming Zeng ,  Chung-Wai Yue

IPC分类号： H04J100

CPC分类号： G01R31/001 ,  H04B3/487

摘要： In an electronic system having logic agents that communicate with each other through one or more signal lines, a method for testing high speed digital signaling on the signal lines is disclosed. The method involves sensing a first crosstalk signal induced by a first digital signal. The first digital signal is driven by a first logic agent into a signal line to communicate with a second agent. The second agent is coupled to receive the first digital signal from the signal line. A logic waveform that represents the digital signal is recorded and/or displayed, based upon the crosstalk signal. The technique may also be used for testing simultaneous bidirectional signaling on the same signal line.

摘要翻译： 在具有通过一个或多个信号线彼此通信的逻辑代理的电子系统中，公开了一种用于在信号线上测试高速数字信令的方法。 该方法包括感测由第一数字信号引起的第一串扰信号。 第一数字信号由第一逻辑代理驱动到信号线中以与第二代理进行通信。 第二代理被耦合以从信号线接收第一数字信号。 基于串扰信号，记录和/或显示表示数字信号的逻辑波形。 该技术还可用于测试同一信号线上的同步双向信令。

公开(公告)号：US06670558B2

公开(公告)日：2003-12-30

申请号：US09935421

申请日：2001-08-22

申请人： Sanjay Dabral ,  Ming Zeng ,  Dillip Sampath ,  Zale T. Schoenborn

发明人： Sanjay Dabral ,  Ming Zeng ,  Dillip Sampath ,  Zale T. Schoenborn

IPC分类号： H01R1204

CPC分类号： H05K1/0224 ,  H05K1/0237 ,  H05K1/0253 ,  H05K1/0298 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09609 ,  H05K2201/09681 ,  H05K2203/1178

摘要： Various bus trace topologies are provided which allow for shorter stub lengths, reduced motherboard costs, more efficient routing between multiple agents, and bus traces with better matched characteristic impedances.

公开(公告)号：US06624717B2

公开(公告)日：2003-09-23

申请号：US09935512

申请日：2001-08-22

申请人： Sanjay Dabral ,  Ming Zeng ,  Dillip Sampath ,  Zale T. Schoenborn

发明人： Sanjay Dabral ,  Ming Zeng ,  Dillip Sampath ,  Zale T. Schoenborn

IPC分类号： H01P308

CPC分类号： H05K1/0224 ,  H05K1/0237 ,  H05K1/0253 ,  H05K1/0298 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09609 ,  H05K2201/09681 ,  H05K2203/1178

摘要： Various bus trace topologies are provided which allow for shorter stub lengths, reduced motherboard costs, more efficient routing between multiple agents, and bus traces with better matched characteristic impedances.

摘要翻译： 提供了各种总线跟踪拓扑，其允许较短的短截线长度，降低的主板成本，多个代理之间更有效的路由以及具有更好匹配特征阻抗的总线迹线。

公开(公告)号：US06594769B2

公开(公告)日：2003-07-15

申请号：US10136011

申请日：2002-04-29

申请人： Sanjay Dabral ,  Stephen R. Mooney ,  T. Zale Schoenborn ,  Sam Calvin ,  Tim Frodsham

发明人： Sanjay Dabral ,  Stephen R. Mooney ,  T. Zale Schoenborn ,  Sam Calvin ,  Tim Frodsham

IPC分类号： G06F126

CPC分类号： H04L12/40032 ,  H04L12/4013

摘要： According to an embodiment of the invention a circuit that is to be coupled to a reference voltage line. The circuit includes a noise coupling circuit that is to couple noise from the circuit to a reference voltage line based upon whether a driver is driving a data line.

摘要翻译： 根据本发明的实施例，要耦合到参考电压线的电路。 电路包括噪声耦合电路，其基于驱动器是否驱动数据线，将来自电路的噪声耦合到参考电压线。

公开(公告)号：US06561820B2

公开(公告)日：2003-05-13

申请号：US09963439

申请日：2001-09-27

申请人： Brent S. Stone ,  Lesley A. Polka ,  Raj Nair ,  Sanjay Dabral

发明人： Brent S. Stone ,  Lesley A. Polka ,  Raj Nair ,  Sanjay Dabral

IPC分类号： H01R1200

CPC分类号： H01R43/205 ,  H01R13/6476

摘要： A method and apparatus for a conductive plate for a socket. The conductive plate includes a plurality of openings. The conductive plate is electrically connected to ground and is contained within a socket that may receive an electronic package. The openings allow pins from the electronic package to pass through to contacts in the socket. The diameter of each opening is customizable to produce desired impedance between the electronic package pin inserted in the contact and the conductive plate. Impedance discontinuity seen by signals passing through the socket from the electronic package pins is reduced. The electronic plate may contain one or more pins insertable into contacts in the socket where the contacts provide the electrical connection to ground.

摘要翻译： 一种用于插座的导电板的方法和装置。 导电板包括多个开口。 导电板电连接到地面并且包含在可以接收电子封装的插座中。 这些开口允许来自电子封装的引脚穿过插座中的触点。 可以定制每个开口的直径以在插入触点的电子封装销和导电板之间产生所需的阻抗。 减少了从电子封装引脚穿过插座的信号所产生的阻抗不连续性。 电子板可以包含可插入插座中的触点中的一个或多个销，其中触点提供与地的电连接。

公开(公告)号：US06434016B1

公开(公告)日：2002-08-13

申请号：US09848996

申请日：2001-05-04

申请人： Ming Zeng ,  Sanjay Dabral

发明人： Ming Zeng ,  Sanjay Dabral

IPC分类号： H05K118

摘要： A method and apparatus interconnecting multiple devices on a circuit board. One disclosed circuit board has a first attach region on a first surface for coupling a first set of pins from a first device to a set of signal lines. A second attach region on a second surface is for coupling a second set of pins from a second device to the set of signal lines. The second attach region is predominantly non-overlapping with respect to the first attach region.

公开(公告)号：US06249329B1

公开(公告)日：2001-06-19

申请号：US09007658

申请日：1998-01-15

申请人： Sanjay Dabral ,  Raymond G. Greene ,  John P. Koons ,  Donald P. Seraphim ,  Boris Yost

发明人： Sanjay Dabral ,  Raymond G. Greene ,  John P. Koons ,  Donald P. Seraphim ,  Boris Yost

IPC分类号： G02F1133

CPC分类号： G02F1/1339 ,  G02F1/13336

摘要： The present invention features flat-panel displays having a mosaic of tiles, and methods of constructing and sealing them. Sealing designs are described to maintain appropriate vacuum levels for FEDs, PFPDs and LCDs. The mosaic of tiles forming a flat-panel display may include subassembly tiles, with each consisting of two, unsealed, substantially parallel plates having a structure positioned between them; these are known as s-tiles. The tiles may be enclosed by a cover plate and backplate. Non-permeable material may be deposited on the cover plate and the backplate, with solderable metal overlaid on the non-permeable material. A metallized, non-permeable spacer/connector is also located between the cover plate and backplate for hermetically sealing the perimeter of the display. A set of electrical-interconnection, metal feed-throughs can also be positioned in the non-permeable spacer/connector. A flat-panel display may also be made up of half-tiles (h-tiles), with each including an individual bottom plate with a structure disposed on them. The mosaic of tiles also has a cover plate that is shared in common with all of the h-tiles. This common cover plate for each type of FPD integrates functions such as masking, screening, color filtering, polarizing and interconnecting. Also provided in the invention is a method for testing the seal of the flat-panel display. A simulated cover plate is attached via a polymeric seal, so that a structure enclosed between the two plates may be evacuated. When a gas is applied around the display seal, its leakage rate is measured, so as to locate the site of defects.

摘要翻译： 本发明的特征在于具有瓦片马赛克的平板显示器及其构造和密封方法。 描述了密封设计，以保持FED，PFPD和LCD的适当真空度。 形成平板显示器的瓷砖的马赛克可以包括子组件瓦片，每个瓦片包括两个未密封的基本平行的板，其具有位于它们之间的结构; 这些被称为s-tiles。 瓦片可以由盖板和背板封闭。 不可渗透的材料可以沉积在盖板和背板上，可焊接的金属覆盖在不可渗透的材料上。 金属化的，不可渗透的间隔件/连接器也位于盖板和背板之间，用于气密地密封显示器的周边。 一组电互连，金属馈通也可以定位在不可渗透的间隔件/连接器中。 平板显示器也可以由半瓦片（h瓦片）组成，每个瓦片包括设置在其上的结构的单个底板。 瓷砖的马赛克还具有与所有h瓦片共享的盖板。 这种用于每种类型的FPD的普通盖板集成了诸如掩模，筛选，滤色，偏振和互连的功能。 本发明还提供了一种用于测试平板显示器的密封件的方法。 模拟盖板通过聚合物密封件连接，使得封闭在两个板之间的结构可以被抽空。 当在显示器密封件周围施加气体时，测量其泄漏率，以便定位缺陷位置。

公开(公告)号：US06243272B1

公开(公告)日：2001-06-05

申请号：US09336486

申请日：1999-06-18

申请人： Ming Zeng ,  Sanjay Dabral

发明人： Ming Zeng ,  Sanjay Dabral

IPC分类号： H05K118

CPC分类号： H05K1/181 ,  H05K1/0237 ,  H05K2201/09236 ,  H05K2201/097 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/1572 ,  Y02P70/611

摘要： A method and apparatus interconnecting multiple devices on a circuit board. One disclosed circuit board has a first attach region on a first surface for coupling a first set of pins from a first device to a set of signal lines. A second attach region on a second surface is for coupling a second set of pins from a second device to the set of signal lines. The second attach region is predominantly non-overlapping with respect to the first attach region.

摘要翻译： 一种将电路板上的多个设备互连的方法和装置。 一个公开的电路板在第一表面上具有第一连接区域，用于将第一组引脚从第一设备耦合到一组信号线。 第二表面上的第二连接区域用于将第二组引脚从第二设备耦合到所述信号线组。 第二附着区域相对于第一附着区域主要是不重叠的。