摘要:
A discontinuity, such as a via, in a signal transmission line can introduce a parasitic element that affects the signal transmission. The method in accordance with embodiments of the present invention are directed to counteracting the transmission line parasitic element discontinuity. The method includes determining the amount of parasitic capacitance or inductance that is introduced at a portion of the transmission line, such as by the via. A suitable amount of delay is introduced to the transmission line by way of correction impedance in order to counteract the affects of the parasitic element. The delay is calculated taking into account at least in part the correction impedance and the parasitic element effect. The correction impedance is suitably added to a portion of the transmission line at which the parasitic element is present.
摘要:
A microstrip line includes a ground conductor layer, a dielectric layer formed on the ground conductor layer, and a linear conductor layer formed on the dielectric layer to have a linear configuration. The linear conductor layer has a wider portion in the upper part of a cross section thereof taken in a direction perpendicular to the direction in which the linear conductor layer extends and a narrower portion in the lower part of the cross section. The narrower portion is smaller in width than the wider portion.
摘要:
A vertical transition device for differential stripline paths, connects differential microstrip paths on a horizontal plane with differential triplate paths on another horizontal plane in a multilayered architecture. The differential microstrip paths include a pair of differential microstrip lines. The differential triplate paths include a pair of triplate lines. The differential microstrip lines are connected with the differential triplate lines by via-holes within the transition device, respectively.
摘要:
Disclosed herein is a multi-layer chip directional coupler. The multi-layer chip directional coupler has a first ground pattern, a coupling signal line, a main signal line, a second ground pattern, and a plurality of ports. The first ground pattern is formed on the upper surface of a first dielectric layer. The coupling signal line is formed of a conduction pattern on the upper surface of a second dielectric layer. The main signal line is formed of a conduction pattern on the upper surface of a third dielectric layer formed over the second dielectric layer. The second ground pattern formed on the upper surface of a fourth dielectric layer formed over the third dielectric layer. A plurality of ports is formed on the side surfaces of the first to fourth dielectric layers.
摘要:
An integrated circuit having a CMOS circuit constituted by electrically connecting an n-type well 2, in which p-channel transistor Tp of the CMOS circuit is set, with a supply line Vdd through switching transistor Tps, and electrically connecting a p-type well 3, in which n-channel transistor Tn of the CMOS circuit is set, with supply line Vss through switching transistor Tns. Thermal runaway due to leakage current can be controlled by turning off switching transistors Tps and Tns and supplying potentials suitable for a test to the n-type well 2 and the p-type well 3 from an external unit when the integrated circuit is being tested. Fluctuations of the latch-up phenomenon and operation speed can be prevented by turning on switching transistors Tps and Tns and setting the n-type well 2 and the p-type well 3 to the voltages Vdd and Vss, respectively.
摘要:
A circuit in a printed circuit board includes a trace and a ground plane coupled to the trace that includes slots in the vicinity of the trace. The slots are dimensioned and arrayed such that the trace has a controlled impedance. An array of slots progressing in a direction parallel to the trace preferably includes repeating subarrays displaced by a repeat distance in a direction parallel to the trace that is less than a characteristic wavelength of a signal propagated on the trace, coupling distributively with the trace. The slots may be polygonal, arcuate, or a combination of both in shape. The printed circuit board may include a second trace coupled to the first. Further, the printed circuit board may include a second ground plane that includes slots that couple to the trace.
摘要:
An inductor for microwave frequencies has a substantially planar structure and is constructed of a transmission line designed as a linear microstrip element made of a central line comprising normal electrically conducting material, such as a suitable metal. The microstrip element has a width which is varied by making areas at sides of the central line superconducting. By changing the effective width of the microstrip, the inductance of the microstrip is changed accordingly. The areas at the sides of the microstrip element in the non-superconducting state may have some electrical conductivity. However, because they contact the central metal conductor only at a very narrow edge, instead of contacting it at a large surface, the side superconducting areas do not significantly affect the transmission characteristics of the transmission path when the superconducting areas are in the normal state.
摘要:
An interface have been provided to permit the formation of solder connections between substrates suitable for microwave to millimeter wave frequencies. Specifically, signal traces on the substrate are selectively masked to form solder dams. The high temperature, thick-film solder dams define the bonding area and control the flow of solder. Since the solder dam forms a finite-extent structure, the solder mask minimally overlies the signal trace, and signal propagation through the trace is not degraded.
摘要:
The invention relates to an electrical transmission arrangement comprising a first section of a conductor with a main extension in a first and a second plane, and a first section of a ground plane which extends essentially in parallel with the first conductor section on a first side thereof, at a certain first distance therefrom and has a main extension in the same two planes as the first conductor section, which first conductor section and first ground plane section together are included in a microstrip arrangement, and a second section of the same conductor, a second and a third ground plane section, where the second and third ground plane sections extend essentially in parallel with the second conductor section on a first and, respectively, second side thereof at a second and, respectively, third distance therefrom, where the second conductor section and the second and third ground plane sections are included in a strip-line arrangement, in which transmission arrangement the conductor sections are separated from adjacent ground plane sections by a dielectric medium. The first and the second conductor sections are displaced in parallel with respect to one another along a third plane and exhibit an electrical connection to one another, and the ground plane sections are displaced in parallel with respect to one another along the same plane as the displacements of the conductor sections.
摘要:
A tunable dielectric structure includes a first layer of dielectric material, a second layer of dielectric material positioned adjacent to the first layer of dielectric material, with the second layer of dielectric material having a dielectric constant that is less than the dielectric constant of the first layer of dielectric material, and electrodes for applying a controllable voltage across the first dielectric material, thereby controlling a dielectric constant of the first dielectric material, wherein at least one of the electrodes is positioned between the first and second layers of dielectric material. The dielectric materials can be formed in various shapes and assembled in various orientations with respect to each other. The tunable dielectric structure is used in various devices including a coaxial cables, cavity antenna, microstrip lines, coplanar lines, and waveguides.