Abstract:
An insulated gate bipolar transistor (IGBT) is provided comprising a semiconductor substrate having the following regions in sequence: (i) a first region of a first conductive type having opposing surfaces, a column region of a second conductive type within the first region extending from a first of said opposing surfaces; (ii) a drift region of the second conductive type; (iii) a second region of the first conductive type, and (iv) a third region of the second conductive type. There is provided a gate electrode disposed to form a channel between the third region and the drift region, a first electrode operatively connected to the second region and the third region, a second electrode operatively connected to the first region and the column region. The arrangement of the IGBT is such that the column region is spaced from a second surface of the opposing surfaces of the first region, whereby a forward conduction path extends sequentially through the third region, the second region, the drift region, and the first region, and whereby a reverse conduction path extends sequentially through the second region, the drift region, the first region and the column region. Reverse conduction of the IGBT occurs through a thyristor structure which is embedded in the IGBT. Such an IGBT structure is advantageous over a reverse conducting IGBT structure in which an anti-parallel diode is integrated or embedded because it provides improved reverse conduction and snapback performance.
Abstract:
A double-layer switchable stereo liquid crystal display includes a timing controller, a microprocessor, a backlight module, a first liquid crystal panel, a controller, and a second liquid crystal panel. The timing controller receives an image signal and generates a left/right eye signal and a two-dimensional/three-dimensional control signal. The microprocessor outputs the image signal, and generates a control signal and a backlight control signal according to output timing of the image signal. The first liquid crystal panel receives and displays the image signal. The controller outputs a voltage control signal according to the control signal. The second liquid crystal panel rotates liquid crystal within the second liquid crystal panel according to the voltage control signal. A period for the second liquid crystal panel rotating the liquid crystal to a second angle is longer than a period for the second liquid crystal panel rotating the liquid crystal to a first angle.
Abstract:
A one time programming (OTP) memory cell includes a first transistor and a second transistor. The first transistor has a first drain, a first source, a first gate, and a first normal operational voltage value higher that a second normal operational voltage value of the second transistor. The second transistor has a second drain, a second source, and a second gate. The first source is coupled to the second drain. The second source is configured to detect data stored in the OTP memory cell.
Abstract:
A compensating device is used for providing current compensation of an IC when operating in the high-voltage. The current compensating device includes a detecting unit, a rectifier, a filtering unit and a switching unit. The detecting unit electrically connected to an AC voltage. The rectifier is electrically connected to the detecting unit. The filtering unit is electrically connected to the rectifier. The switching unit is electrically connected to the filtering unit. The switching unit is conducted and provides a current to the IC when the AC voltage is above a predetermined voltage.
Abstract:
The mechanisms of forming an interconnect structures described above involves using a reflowed conductive layer. The reflowed conductive layer is thicker in smaller openings than in wider openings. The mechanisms may further involve forming a metal cap layer over the reflow conductive layer, in some embodiments. The interconnect structures formed by the mechanisms described have better electrical and reliability performance.
Abstract:
A multiplication circuit generates a product of a matrix and a first scalar when in matrix mode and a product of a second scalar and a third scalar when in scalar mode. The multiplication circuit comprises a sub-product generator, an accumulator and an adder. The adder is configured to sum outputs of the accumulator to generate the product of the first scalar second scalar and the third scalar when in scalar mode. The sub-product generator generates sub-products of the matrix and the first scalar when in matrix mode and sub-products of the second scalar and the third scalar when in scalar mode. The accumulator is configured to generate the product of the matrix and the first scalar by providing save of the multiplication operation of the outputs from the sub-product generator.
Abstract:
A solar cell inspection method and apparatus are disclosed. An embodiment of the solar cell inspection method includes the steps of: charging a diffusion capacitance of a solar cell; after charging the diffusion capacitance, discharging the diffusion capacitance; and detecting light emitted by the solar cell during the discharging step.
Abstract:
A circuit includes a fuse and a sensing and control circuit. The fuse is coupled between a MOS transistor and a current source node. The sensing and control circuit is configured to receive a programming pulse and output a modified programming signal to the gate of the MOS transistor for programming the fuse. The modified programming signal has a pulse width based on a magnitude of a current through the first fuse.
Abstract:
A phase locked loop and an associated alignment method are provided. A disclosed phase locked loop receives a reference signal to provide a feedback signal. The phase locked loop is first opened. When the phase locked loop is open, a frequency range of an oscillating signal from a voltage-controlled oscillator is substantially selected. The feedback signal is provided according to the oscillation signal. After the frequency range is selected, the phase locked loop is kept open and the phases of the reference signal and the feedback signal are substantially aligned. The phase locked loop is then closed after the reference signal and the feedback signal are aligned.
Abstract:
An adjustable dressing mirror assembly includes a support, a mirror-mounting unit, and a positioning device. The positioning device includes a guiding seat connected pivotally to the support, a driving plate connected pivotally to the mirror-mounting unit, a sliding block, a movable member, a positioning rod, and a resilient member. The guiding seat includes an accommodating chamber and a plurality of positioning grooves. The driving plate and the sliding block are movable in the accommodating chamber. The positioning rod is disposed fixedly on the movable member. Engagement between the positioning rod and the positioning grooves is allowed with assistance of the resilient member during movement of the driving plate within the accommodating chamber from a rear limit position to a front limit position, and is prevented during movement of the driving plate within the accommodating chamber from the front limit position to the rear limit position.