RADIATION HARDENED BIPOLAR INJUNCTION TRANSISTOR
    142.
    发明申请
    RADIATION HARDENED BIPOLAR INJUNCTION TRANSISTOR 有权
    辐射硬化双极性介电晶体管

    公开(公告)号:US20120168909A1

    公开(公告)日:2012-07-05

    申请号:US13334087

    申请日:2011-12-22

    CPC classification number: H01L29/402 H01L29/66272 H01L29/7322

    Abstract: A method for integrating a bipolar injunction transistor in a semiconductor chip includes the steps of forming an intrinsic base region of a second type of conductivity extending in the collector region from a main surface through an intrinsic base window of the sacrificial insulating layer, forming an emitter region of the first type of conductivity extending in the intrinsic base region from the main surface through an emitter window of the sacrificial insulating layer, removing the sacrificial insulating layer, forming an intermediate insulating layer on the main surface, and forming an extrinsic base region of the second type of conductivity extending in the intrinsic base region from the main surface through an extrinsic base window of the intermediate insulating layer

    Abstract translation: 一种用于在半导体芯片中积分双极性抑制晶体管的方法包括以下步骤:在主表面通过牺牲绝缘层的本征基极窗形成在集电极区域中延伸的第二类型导电的本征基极区域,形成发射极 所述第一类型的导电性区域从所述主表面延伸穿过所述牺牲绝缘层的发射极窗口,去除所述牺牲绝缘层,在所述主表面上形成中间绝缘层,以及形成所述牺牲绝缘层的外部基极区域 该第二类型的导电性在本征基区中从主表面穿过中间绝缘层的非本征基窗延伸

    PROPPANT
    146.
    发明申请
    PROPPANT 失效
    推荐

    公开(公告)号:US20120018162A1

    公开(公告)日:2012-01-26

    申请号:US13186942

    申请日:2011-07-20

    CPC classification number: C09K8/805 C09K8/62 Y10T428/2991 Y10T428/2998

    Abstract: A proppant comprises a particle and a polyamide imide coating disposed on the particle. A method of forming the proppant comprises the steps of providing the particle, providing the polyamide imide coating, and coating the particle with the polyamide imide coating.

    Abstract translation: 支撑剂包括颗粒和设置在颗粒上的聚酰胺酰亚胺涂层。 形成支撑剂的方法包括提供颗粒,提供聚酰胺酰亚胺涂层以及用聚酰胺酰亚胺涂层涂覆颗粒的步骤。

    Scalable language infrastructure for electronic system level tools
    147.
    发明授权
    Scalable language infrastructure for electronic system level tools 失效
    电子系统级工具的可扩展语言基础设施

    公开(公告)号:US08104016B2

    公开(公告)日:2012-01-24

    申请号:US11356578

    申请日:2006-02-17

    CPC classification number: G06F8/36

    Abstract: Systems and methods of scalable language infrastructure for electronic system level tools. In accordance with embodiments of the present invention, knowledge about types, functions and the like is encapsulated in a plurality of intelligent components called active component extension modules that are external to the infrastructure. The infrastructure implements a communication mechanism between the clients and these intelligent components, and acts as a common backbone. The infrastructure itself does not maintain any knowledge about any client, types, functions, etc. In accordance with a method embodiment of the present invention, a request is received from a client of a language infrastructure. The request is forwarded from the language infrastructure to an active component extension module. The active component extension module performs a service responsive to the request.

    Abstract translation: 用于电子系统级工具的可扩展语言基础设施的系统和方法。 根据本发明的实施例,关于类型,功能等的知识被封装在被称为活动组件扩展模块的多个智能组件中,该组件在基础设施外部。 基础架构实现了客户端和这些智能组件之间的通信机制,并且作为通用骨干网。 基础设施本身并不保持关于任何客户端,类型,功能等的任何知识。根据本发明的方法实施例,从语言基础设施的客户端接收请求。 该请求从语言基础设施转发到活动组件扩展模块。 活动组件扩展模块响应于该请求执行服务。

    Methods of manufacturing printed circuit boards
    150.
    发明授权
    Methods of manufacturing printed circuit boards 有权
    制造印刷电路板的方法

    公开(公告)号:US08020292B1

    公开(公告)日:2011-09-20

    申请号:US12772086

    申请日:2010-04-30

    Abstract: Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies are provided. In one embodiment, the invention relates to a method of manufacturing a printed circuit board including providing a core subassembly including at least one metal layer, providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, and attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly.

    Abstract translation: 提供了使用并行处理来与子组件互连的印刷电路板的制造方法。 在一个实施例中,本发明涉及一种制造印刷电路板的方法,其包括提供包括至少一个金属层的芯子组件,在并行处理多个单金属层载体中的每一个之后提供多个单金属层载体 并且将所述多个一金属层载体中的至少两个彼此并且与所述芯子组件相连。

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