公开(公告)号：US08817524B2

公开(公告)日：2014-08-26

申请号：US13722314

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  SanDisk/Toshiba ,  Kabushiki Kaisha Toshiba

Inventor： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Dipankar Pramanik ,  Takeshi Yamaguchi

IPC: G11C13/00 ,  G11C7/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1608 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/56 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from alloys of transition metals. Some examples of such alloys include chromium containing alloys that may also include nickel, aluminum, and/or silicon. Other examples include tantalum and/or titanium containing alloys that may also include a combination of silicon and carbon or a combination of aluminum and nitrogen. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature processing. In some embodiments, the breakdown voltage of a current limiting layer is at least about 8V. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layers while maintaining their performance.

Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由过渡金属的合金形成的限流层。 这种合金的一些实例包括还可以包括镍，铝和/或硅的含铬合金。 其它实例包括也可以包括硅和碳的组合或铝和氮的组合的含钽和/或钛的合金。 这些限流层可具有至少约1欧姆 - 厘米的电阻率。 即使当这些层受到强电场和/或高温处理时，也保持该电阻率水平。 在一些实施例中，限流层的击穿电压为至少约8V。 层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

公开(公告)号：US08809205B2

公开(公告)日：2014-08-19

申请号：US13721549

申请日：2012-12-20

Applicant: Intermolecular, Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L21/469

CPC classification number: H01L45/145 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616

Abstract: Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.

Abstract translation: 提供了使用原子层沉积技术形成非易失性存储元件的方法，其中存储元件的至少两个不同层顺次沉积并且在沉积室中不破坏真空。 该方法可以用于防止用于电极的各种材料的氧化，而不需要单独的氧阻隔层。 可以使用信号线和电阻开关层的组合来封盖电极并使其氧化最小化。 因此，存储元件中需要更少的层。 此外，原子层沉积允许更精确地控制电极厚度。 在一些实施例中，电极的厚度可以小于50埃。 总的来说，电极和电阻开关层的原子层沉积导致整个存储元件的较小厚度，使得它们更适合于高级节点的低纵横比特征。

公开(公告)号：US20140175357A1

公开(公告)日：2014-06-26

申请号：US13724126

申请日：2012-12-21

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Federico Nardi ,  Yun Wang

IPC: H01L45/00

CPC classification number: H01L45/06 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/065 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1616 ,  H01L51/0098

Abstract: A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and life and methods for forming the same. The nonvolatile memory device has a first layer on a substrate, a resistive switching layer on the first layer, and a second layer. The resistive switching layer is disposed between the first layer and the second layer and the resistive switching layer comprises a material having the same morphology as the top surface of the first layer. A method of forming a nonvolatile memory element in a ReRAM device includes forming a resistive switching layer on a first layer and forming a second layer, so that the resistive switching layer is disposed between the first layer and the second layer. The resistive switching layer comprises a material formed with the same morphology as the top surface of the first layer.

Abstract translation: 非易失性存储器件包含具有改进的器件切换性能和寿命的电阻式开关存储器元件及其形成方法。 非易失性存储器件在衬底上具有第一层，在第一层上具有电阻性开关层，以及第二层。 电阻开关层设置在第一层和第二层之间，电阻开关层包括与第一层的顶表面相同形态的材料。 在ReRAM器件中形成非易失性存储元件的方法包括在第一层上形成电阻式开关层并形成第二层，使得电阻式开关层位于第一层和第二层之间。 电阻开关层包括与第一层的顶表面形成相同形态的材料。

公开(公告)号：US20140175355A1

公开(公告)日：2014-06-26

申请号：US13721587

申请日：2012-12-20

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/1633 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1641

Abstract: Provided are carbon doped resistive switching layers, resistive random access memory (ReRAM) cells including these layers, as well as methods of forming thereof. Carbon doping of metal containing materials creates defects in these materials that allow forming and breaking conductive paths as evidenced by resistive switching. Relative to many conventional dopants, carbon has a lower diffusivity in many suitable base materials. As such, these carbon doped materials exhibit structural stability and consistent resistive switching over many operating cycles. Resistive switching layers may include as much as 30 atomic percent of carbon, making the dopant control relatively simple and flexible. Furthermore, carbon doping has acceptor characteristics resulting in a high resistivity and low switching currents, which are very desirable for ReRAM applications. Carbon doped metal containing layer may be formed from metalorganic precursors at temperatures below saturation ranges of atomic layer deposition.

Abstract translation: 提供碳掺杂电阻开关层，包括这些层的电阻随机存取存储器（ReRAM）单元以及其形成方法。 含金属材料的碳掺杂在这些材料中产生缺陷，允许形成和断开导电路径，如电阻式开关所证明的。 相对于许多常规掺杂剂，碳在许多合适的基材中具有较低的扩散系数。 因此，这些碳掺杂材料在许多操作循环中表现出结构稳定性和一致的电阻切换。 电阻开关层可以包括多达30原子％的碳，使得掺杂剂控制相对简单和灵活。 此外，碳掺杂具有导致高电阻率和低开关电流的受体特性，这对于ReRAM应用是非常需要的。 含碳掺杂金属的层可以在低于原子层沉积的饱和范围的温度下由金属有机前体形成。

公开(公告)号：US20140166960A1

公开(公告)日：2014-06-19

申请号：US13714106

申请日：2012-12-13

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Federico Nardi ,  Yun Wang

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/16 ,  H01L45/1608

Abstract: A nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, and methods of forming the same. A nonvolatile memory element includes a first electrode layer formed on a substrate, a resistive switching layer formed on the first electrode layer, and a second electrode layer. The resistive switching layer comprises a metal oxide and is disposed between the first electrode layer and the second electrode layer. The elemental metal selected for each of the first and second electrode layers is the same metal as selected to form the metal oxide resistive switching layer. The use of common metal materials within the memory element eliminates the growth of unwanted and incompatible native oxide interfacial layers that create undesirable circuit impedance.

Abstract translation: 一种非易失性存储器件，其包含具有改进的器件切换性能和寿命的电阻式开关存储元件及其形成方法。 非易失性存储元件包括形成在基板上的第一电极层，形成在第一电极层上的电阻开关层和第二电极层。 电阻开关层包括金属氧化物，并且设置在第一电极层和第二电极层之间。 为第一和第二电极层中的每一个选择的元素金属与所选择的金属相同，以形成金属氧化物电阻式开关层。 在记忆元件内部使用普通金属材料消除了不希望的和不相容的天然氧化物界面层的生长，产生不希望的电路阻抗。

公开(公告)号：US20140166956A1

公开(公告)日：2014-06-19

申请号：US13714162

申请日：2012-12-13

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Randall J. Higuchi ,  Chien-Lan Hsueh ,  Yun Wang

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and lifetime by custom tailoring the average concentration of defects in the resistive switching film and methods of forming the same. The nonvolatile memory element includes a first electrode layer, a second electrode layer, and a resistive switching layer disposed between the first electrode layer and the second electrode layer. The resistive switching layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer has more defects than the first sub-layer. A method includes forming a first sub-layer on the first electrode layer by a first ALD process and forming a second sub-layer on the first sub-layer by a second ALD process, where the first sub-layer has a different amount of defects than the second sub-layer.

Abstract translation: 非易失性存储器件包含电阻式开关存储器元件，通过定制电阻式开关膜中的平均缺陷浓度及其形成方法，具有改进的器件切换性能和寿命。 非易失性存储元件包括设置在第一电极层和第二电极层之间的第一电极层，第二电极层和电阻开关层。 电阻开关层包括第一子层和第二子层，其中第一子层具有比第一子层更多的缺陷。 一种方法包括通过第一ALD工艺在第一电极层上形成第一子层，并通过第二ALD工艺在第一子层上形成第二子层，其中第一子层具有不同的缺陷量 比第二个子层。

公开(公告)号：US08750021B2

公开(公告)日：2014-06-10

申请号：US13957324

申请日：2013-08-01

Applicant: Intermolecular, Inc.

Inventor： Yun Wang ,  Tony P. Chiang ,  Prashant B. Phatak

IPC: G11C11/36 ,  G11C7/00 ,  G11C17/06 ,  G11C5/02 ,  G11C13/00 ,  G11C13/02 ,  G11C13/04

CPC classification number: G11C13/02 ,  G11C7/00 ,  G11C11/36 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/72

Abstract: According to various embodiments, a resistive-switching memory element and memory element array that uses a bipolar switching includes a select element comprising only a single diode that is not a Zener diode. The resistive-switching memory elements described herein can switch even when a switching voltage less than the breakdown voltage of the diode is applied in the reverse-bias direction of the diode. The memory elements are able to switch during the very brief period when a transient pulse voltage is visible to the memory element, and therefore can use a single diode per memory cell.

Abstract translation: 根据各种实施例，使用双极开关的电阻式开关存储器元件和存储元件阵列包括仅包括不是齐纳二极管的单个二极管的选择元件。 即使当在二极管的反向偏置方向上施加小于二极管的击穿电压的开关电压时，这里描述的电阻式开关存储元件也可以切换。 存储器元件能够在瞬态脉冲电压对存储元件可见时的非常短的时间内进行切换，因此每个存储器单元可以使用单个二极管。

公开(公告)号：US08735864B2

公开(公告)日：2014-05-27

申请号：US13971620

申请日：2013-08-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Mihir Tendulkar ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L29/02

CPC classification number: H01L45/1608 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/15 ,  G11C2213/32 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616

Abstract: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises a resistive material that is configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel nitride that is a current limiting material that is disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.

Abstract translation: 本发明的实施例通常包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括被配置为改善电阻式开关存储器元件的开关性能和寿命的电阻材料。 电流限制层的电性能被配置为通过在电阻式开关存储元件中增加固定的串联电阻来在逻辑状态编程步骤（即，“设置”和“复位”步骤）期间降低通过可变电阻层的电流 存在于非易失性存储器件中。 在一个实施例中，限流部件包括隧道氮化物，其是限制在非易失性电阻式开关存储器件中的电阻式开关存储器元件内的限流材料。

公开(公告)号：US20130337606A1

公开(公告)日：2013-12-19

申请号：US13971620

申请日：2013-08-20

Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

Inventor： Mihir Tendulkar ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/15 ,  G11C2213/32 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616

Abstract: Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises a resistive material that is configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel nitride that is a current limiting material that is disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.

Abstract translation: 本发明的实施例通常包括一种形成非易失性存储器件的方法，该非易失性存储器件包含由于添加限定在其中的限流部件而具有改进的器件切换性能和寿命的电阻式开关存储元件。 在一个实施例中，限流部件包括被配置为改善电阻式开关存储器元件的开关性能和寿命的电阻材料。 电流限制层的电性能被配置为通过在电阻式开关存储元件中增加固定的串联电阻来在逻辑状态编程步骤（即，“设置”和“复位”步骤）期间降低通过可变电阻层的电流 存在于非易失性存储器件中。 在一个实施例中，限流部件包括隧道氮化物，其是限制在非易失性电阻式开关存储器件中的电阻式开关存储器元件内的限流材料。

公开(公告)号：US20130314974A1

公开(公告)日：2013-11-28

申请号：US13957324

申请日：2013-08-01

Applicant: Intermolecular, Inc.

Inventor： Yun Wang ,  Tony P. Chiang ,  Prashant B. Phatak

IPC: G11C13/00

CPC classification number: G11C13/02 ,  G11C7/00 ,  G11C11/36 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/72

Abstract: According to various embodiments, a resistive-switching memory element and memory element array that uses a bipolar switching includes a select element comprising only a single diode that is not a Zener diode. The resistive-switching memory elements described herein can switch even when a switching voltage less than the breakdown voltage of the diode is applied in the reverse-bias direction of the diode. The memory elements are able to switch during the very brief period when a transient pulse voltage is visible to the memory element, and therefore can use a single diode per memory cell.