利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

57 条记录 (耗时 0.034 秒)

    Resistive random access memory cells having shared electrodes with transistor devices
    3.
    发明授权
    Resistive random access memory cells having shared electrodes with transistor devices 有权
    具有与晶体管器件共享的电极的电阻式随机存取存储器单元

    公开(公告)号：US09178000B1

    公开(公告)日：2015-11-03

    申请号：US14264280

    申请日：2014-04-29

    申请人： Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    发明人： Federico Nardi ,  Ryan C. Clarke ,  Tim Minvielle ,  Yun Wang

    IPC分类号： H01L29/02 ,  H01L29/792 ,  H01L27/11 ,  H01L21/00 ,  H01L27/24 ,  H01L45/00 ,  H01L29/08 ,  H01L21/265 ,  H01L21/02

    CPC分类号： H01L27/2463 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/265 ,  H01L27/2436 ,  H01L29/0847 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

    摘要： Provided are resistive random access memory (ReRAM) cells having extended conductive layers operable as electrodes of other devices, and methods of fabricating such cells and other devices. A conductive layer of a ReRAM cell extends beyond the cell boundary defined by the variable resistance layer. The extended portion may be used a source or drain region of a FET that may control an electrical current through the cell or other devices. The extended conductive layer may be also operable as electrode of another resistive-switching cell or a different device. The extended conductive layer may be formed from doped silicon. The variable resistance layer of the ReRAM cell may be positioned on the same level as a gate dielectric layer of the FET. The variable resistance layer and the gate dielectric layer may have the same thickness and share common materials, though they may be differently doped.

    摘要翻译： 提供了具有可操作为其他器件的电极的延伸导电层的电阻随机存取存储器（ReRAM）单元，以及制造这样的单元和其它器件的方法。 ReRAM单元的导电层延伸超过由可变电阻层限定的单元边界。 延伸部分可以用于可控制通过电池或其他装置的电流的FET的源极或漏极区域。 扩展导电层也可以作为另一电阻式开关电池或不同器件的电极工作。 延伸的导电层可以由掺杂的硅形成。 ReRAM单元的可变电阻层可以位于与FET的栅极电介质层相同的水平上。 可变电阻层和栅极电介质层可以具有相同的厚度并且共享共同的材料，尽管它们可以是不同的掺杂。

    Memory cell having an integrated two-terminal current limiting resistor
    4.
    发明授权
    Memory cell having an integrated two-terminal current limiting resistor 有权
    具有集成的两端限流电阻的存储单元

    公开(公告)号：US08975727B2

    公开(公告)日：2015-03-10

    申请号：US13721310

    申请日：2012-12-20

    申请人： Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Tim Minvielle ,  Dipankar Pramanik ,  Takeshi Yamaguchi

    IPC分类号： H01L29/8605 ,  H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/12 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

    摘要： A resistor structure incorporated into a resistive switching memory cell with improved performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory cell. A method is also provided for making such a memory cell. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory cell, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory cell. The incorporation of the resistor structure is very useful in obtaining desirable levels of switching currents that meet the switching specification of various types of memory cells. The memory cells may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices.

    摘要翻译： 提供了一种结合到具有改进的性能和寿命的电阻式开关存储单元中的电阻器结构。 电阻器结构可以是设计成减小流过存储器单元的最大电流的两端结构。 还提供了一种用于制造这种存储单元的方法。 该方法包括沉积电阻器结构并沉积存储单元的电阻式开关存储单元的可变电阻层，其中电阻器结构与可变电阻层串联布置以限制存储单元的开关电流。 电阻器结构的结合对于获得满足各种类型的存储器单元的开关规范的期望的开关电流水平是非常有用的。 存储单元可以形成为可用于各种电子设备的大容量非易失性存储器集成电路的一部分。

    Atomic Layer Deposition of Metal Oxides for Memory Applications
    5.
    发明申请
    Atomic Layer Deposition of Metal Oxides for Memory Applications 有权
    用于存储器应用的金属氧化物的原子层沉积

    公开(公告)号：US20140363920A1

    公开(公告)日：2014-12-11

    申请号：US14466695

    申请日：2014-08-22

    申请人： Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    发明人： Zhendong Hong ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Hieu Pham ,  Takeshi Yamaguchi

    IPC分类号： H01L45/00

    CPC分类号： H01L45/146 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

    摘要： Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

    摘要翻译： 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其包含至少一个硬金属氧化物膜（例如，金属被完全氧化或基本上被氧化 ）和至少一种软金属氧化物膜（例如，金属比硬金属氧化物氧化较少）。 由于软金属氧化物膜比硬金属氧化物膜氧化得更少或更金属，所以软金属氧化物膜的电阻小于硬金属氧化物膜。 在一个实例中，通过利用臭氧作为氧化剂的ALD工艺形成硬质金属氧化物膜，而通过利用水蒸汽作为氧化剂的另一ALD工艺形成软金属氧化物膜。

    Resistive random access memory access cells having thermally isolating structures
    6.
    发明授权
    Resistive random access memory access cells having thermally isolating structures 有权
    具有隔热结构的电阻式随机存取存储器存取单元

    公开(公告)号：US08890109B2

    公开(公告)日：2014-11-18

    申请号：US13721658

    申请日：2012-12-20

    申请人： Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    发明人： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

    IPC分类号： H01L47/00 ,  H01L45/00

    CPC分类号： H01L45/1293 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625

    摘要： Provided are resistive random access memory (ReRAM) cells including resistive switching layers and thermally isolating structures for limiting heat dissipation from the switching layers during operation. Thermally isolating structures may be positioned within a stack or adjacent to the stack. For example, a stack may include one or two thermally isolating structures. A thermally isolating structure may directly interface with a switching layer or may be separated by, for example, an electrode. Thermally isolating structures may be formed from materials having a thermal conductivity of less than 1 W/m*K, such as porous silica and mesoporous titanium oxide. A thermally isolating structure positioned in series with a switching layer generally has a resistance less than the low resistance state of the switching layer. A thermally isolating structure positioned adjacent to a switching layer may have a resistance greater than the high resistance state of the switching layer.

    摘要翻译： 提供了电阻随机存取存储器（ReRAM）单元，其包括电阻开关层和用于在操作期间限制来自开关层的散热的热隔离结构。 热隔离结构可以位于堆叠内或邻近堆叠。 例如，堆叠可以包括一个或两个热隔离结构。 热隔离结构可以直接与开关层接口或者可以通过例如电极分离。 热分离结构可以由导热率小于1W / m×K的材料形成，例如多孔二氧化硅和中孔氧化钛。 与开关层串联设置的隔热结构通常具有小于开关层的低电阻状态的电阻。 位于与开关层相邻的隔热结构可具有大于开关层的高电阻状态的电阻。

    Limited maximum fields of electrode-switching layer interfaces in Re-RAM cells
    7.
    发明授权
    Limited maximum fields of electrode-switching layer interfaces in Re-RAM cells 有权
    Re-RAM单元中电极切换层界面的最大场有限

    公开(公告)号：US08860002B2

    公开(公告)日：2014-10-14

    申请号：US13721450

    申请日：2012-12-20

    申请人： Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    发明人： Mihir Tendulkar ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

    IPC分类号： H01L45/00

    CPC分类号： H01L45/1253 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625

    摘要： Provided are ReRAM cells, each having at least one interface between an electrode and a resistive switching layers with a maximum field value of less than 0.25. The electrode materials forming such interfaces include tantalum nitrides doped with lanthanum, aluminum, erbium yttrium, or terbium (e.g., TaX(Dopant)YN, where X is at least about 0.95). The electrode materials have low work functions (e.g., less than about 4.5 eV). At the same time, the resistive switching materials have high relative dielectric permittivities (e.g., greater than about 30) and high electron affinities (greater than about for 3.5 eV). Niobium oxide is one example of a suitable resistive switching material. Another electrode interfacing the resistive switching layer may have different characteristics and, in some embodiments, may be an inert electrode.

    摘要翻译： 提供的是ReRAM单元，每个单元在电极和电阻切换层之间具有至少一个界面，其最大场值小于0.25。 形成这种界面的电极材料包括掺杂有镧，铝，铒钇或铽的钽氮化物（例如TaX（掺杂剂）YN，其中X为至少约0.95）。 电极材料具有低功函数（例如小于约4.5eV）。 同时，电阻式开关材料具有较高的相对介电常数（例如大于约30）和高电子亲和力（大于3.5eV）。 氧化铌是合适的电阻式开关材料的一个例子。 连接电阻式开关层的另一电极可以具有不同的特性，并且在一些实施例中可以是惰性电极。

    Transition Metal Oxide Bilayers
    8.
    发明申请
    Transition Metal Oxide Bilayers 有权
    过渡金属氧化物双层

    公开(公告)号：US20140217348A1

    公开(公告)日：2014-08-07

    申请号：US14252285

    申请日：2014-04-14

    申请人： Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    发明人： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

    IPC分类号： H01L45/00

    CPC分类号： H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

    摘要： Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

    摘要翻译： 本发明的实施例包括非易失性存储器元件和包括非易失性存储元件的存储器件。 还公开了形成非易失性存储元件的方法。 非易失性存储元件包括第一电极层，第二电极层和设置在第一和第二电极层之间的多个氧化物层。 氧化物层中的一个具有线性电阻和亚化学计量组成，另一个氧化物层具有双稳态电阻和近化学计量组成。 优选地，两个氧化物层厚度的总和在约和之间，并且具有双稳态电阻的氧化物层具有在总厚度的约25％至约75％之间的厚度。 在一个实施例中，氧化物层在具有受控的氩气和氧气的气氛中使用反应溅射形成。