公开(公告)号：US20150048363A1

公开(公告)日：2015-02-19

申请号：US14496368

申请日：2014-09-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/51

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/24 ,  H01L29/247 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/78609 ,  H01L29/78693 ,  H01L29/78696

Abstract: Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.

Abstract translation: 包括在电路中的薄膜晶体管的电特性的均匀性和稳定性对于包括所述电路的显示装置的性能至关重要。 本发明的目的是提供一种具有低氢含量的氧化物半导体膜，并且其用于具有良好限定的电特性的反交错薄膜晶体管中。 为了达到上述目的，栅极绝缘膜，氧化物半导体层和沟道保护膜依次用溅射法形成，而不暴露在空气中。 氧化物半导体层形成为在包含一定比例氧气的气氛中限制氢污染。 此外，使用硅，氧和/或氮的化合物形成在氧化物半导体层的沟道形成区之上和之下设置的层。

公开(公告)号：US20140374755A1

公开(公告)日：2014-12-25

申请号：US14483662

申请日：2014-09-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Hiroshi KANEMURA ,  Kengo AKIMOTO ,  Suzunosuke HIRAISHI

IPC: H01L29/24 ,  H01L29/786 ,  H01L29/04

CPC classification number: H01L29/247 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: Provided is an oxide semiconductor film which has more stable electric characteristics and essentially consists of indium zinc oxide. In addition, provided is a highly reliable semiconductor device which has stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film essentially consisting of indium zinc oxide has a hexagonal crystal structure in which the a-b plane is substantially parallel to a surface of the oxide semiconductor film and a rhombohedral crystal structure in which the a-b plane is substantially parallel to the surface of the oxide semiconductor film.

Abstract translation: 提供了具有更稳定的电特性并且基本上由氧化铟锌组成的氧化物半导体膜。 此外，提供了通过使用氧化物半导体膜具有稳定的电特性的高度可靠的半导体器件。 基本上由氧化铟锌组成的氧化物半导体膜具有六边形晶体结构，其中ab平面基本上平行于氧化物半导体膜的表面，并且其中ab平面基本上平行于氧化物表面的菱方晶体结构 半导体膜。

公开(公告)号：US20140329365A1

公开(公告)日：2014-11-06

申请号：US14334016

申请日：2014-07-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC: H01L29/66

CPC classification number: H01L29/66772 ,  H01L29/6675 ,  H01L29/78618 ,  H01L29/7869

Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

Abstract translation: 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

公开(公告)号：US20140175438A1

公开(公告)日：2014-06-26

申请号：US14191714

申请日：2014-02-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Hiroshi KANEMURA ,  Kengo AKIMOTO ,  Suzunosuke HIRAISHI

IPC: H01L29/786 ,  H01L29/04

CPC classification number: H01L29/247 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: Provided is an oxide semiconductor film which has more stable electric characteristics and essentially consists of indium zinc oxide. In addition, provided is a highly reliable semiconductor device which has stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film essentially consisting of indium zinc oxide has a hexagonal crystal structure in which the a-b plane is substantially parallel to a surface of the oxide semiconductor film and a rhombohedral crystal structure in which the a-b plane is substantially parallel to the surface of the oxide semiconductor film.

公开(公告)号：US20140017860A1

公开(公告)日：2014-01-16

申请号：US14028560

申请日：2013-09-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC: H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/45 ,  H01L29/66742

Abstract: A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.

Abstract translation: 半导体器件包括氧化物半导体层，其包括沟道形成区域，该沟道形成区域包括具有宽带隙的氧化物半导体和尽可能低的载流子浓度，以及源极和漏极，其包括含有氢的氧化物导体和 氧空位和防止氧和氧在氧化物导电层和氧化物半导体层之间的扩散的阻挡层。 氧化物导电层和氧化物半导体层通过阻挡层彼此电连接。

公开(公告)号：US20130147519A1

公开(公告)日：2013-06-13

申请号：US13761302

申请日：2013-02-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Kengo AKIMOTO ,  Masashi TSUBUKU

IPC: H03K19/094

CPC classification number: H03K19/094 ,  H01L27/0883 ,  H01L27/1225 ,  H03K19/09407 ,  H03K19/09421 ,  H03K19/096

Abstract: An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.

Abstract translation: 目的是将使用氧化物半导体的晶体管施加到包括增强晶体管的逻辑电路。 逻辑电路包括耗尽晶体管101和增强晶体管102.晶体管101和102各自包括栅电极，栅极绝缘层，第一氧化物半导体层，第二氧化物半导体层，源电极和漏电极 。 晶体管102包括在源电极和漏极之间的第一氧化物半导体层中的区域上设置的还原防止层。

公开(公告)号：US20130078762A1

公开(公告)日：2013-03-28

申请号：US13680349

申请日：2012-11-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Toshinari SASAKI ,  Hideaki KUWABARA

IPC: H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.

公开(公告)号：US20250142888A1

公开(公告)日：2025-05-01

申请号：US19006702

申请日：2024-12-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masahiro TAKAHASHI ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC: H10D30/67 ,  C01G15/00 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/02 ,  H10D62/40 ,  H10D62/80 ,  H10D86/01 ,  H10D86/40 ,  H10D86/60 ,  H10D99/00 ,  H10K59/121

Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+δGa1−δO3(ZnO)m (0

公开(公告)号：US20240413167A1

公开(公告)日：2024-12-12

申请号：US18808380

申请日：2024-08-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/36 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121

Abstract: An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

公开(公告)号：US20240363639A1

公开(公告)日：2024-10-31

申请号：US18766834

申请日：2024-07-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1214 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/66742 ,  H01L29/7869 ,  H01L29/78693 ,  G02F1/13624

Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.