公开(公告)号：US20240143268A1

公开(公告)日：2024-05-02

申请号：US17977131

申请日：2022-10-31

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Basavaraj Hiregoudar

IPC: G06F3/16

CPC classification number: G06F3/162 ,  G06F3/165

Abstract: A computing system implementing a single Integrated Inter-chip Sound (I2S) controller supports simultaneous playback of audio data on different audio endpoints. The computing system maps a first set of audio data to a first set of transmission slots associated with a transmission channel of the single I2S controller. The computing system also maps a second set of audio data to a second set of transmission slots associated with the single I2S controller. The computing system transmits the first set of audio data during the first set of transmission slots to a first audio endpoint and transmits the second set of audio data during the second set of transmission slots to a second audio endpoint.

公开(公告)号：US20240142515A1

公开(公告)日：2024-05-02

申请号：US18050742

申请日：2022-10-28

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Amanullah Samit ,  Raman Madras Srinivasan ,  Aniruddha Dasgupta

IPC: G01R31/28

CPC classification number: G01R31/2896 ,  G01R31/287 ,  G01R31/2879

Abstract: An apparatus and method for efficiently managing power consumption of multiple partitions of an integrated circuit. A processing unit includes multiple partitions, each assigned to operation parameters of a respective power domain. Each of the partitions is assigned to operating parameters of a respective power domain. A power manager accesses a total power consumption budget for the multiple partitions and sends corresponding assigned power limits to the multiple partitions. A particular partition calculates a corresponding measurement of power consumption as a weighted sum of sampled signals, and performs steps to reduce power consumption when the particular partition determines the corresponding measurement of power consumption exceeds a corresponding assigned power limit. The power manager updates the assigned power limits within a first time interval. The multiple partitions calculate the power consumption measurements and perform power reduction steps within a second time interval less than the first time interval.

公开(公告)号：US20240134795A1

公开(公告)日：2024-04-25

申请号：US17957823

申请日：2022-10-18

Applicant: Advanced Micro Devices, Inc.

Inventor： Ganesh Balakrishnan ,  Amit Apte ,  Ann Ling ,  Vydhyanathan Kalyanasundharam

IPC: G06F12/0815

CPC classification number: G06F12/0815

Abstract: A method includes, in a cache directory, storing an entry associating a memory region with an exclusive coherency state, and in response to a memory access directed to the memory region, transmitting a demote superprobe to convert at least one cache line of the memory region from an exclusive coherency state to a shared coherency state.

公开(公告)号：US11967043B2

公开(公告)日：2024-04-23

申请号：US18089209

申请日：2022-12-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander M. Potapov ,  Skyler Jonathon Saleh ,  Swapnil P. Sakharshete ,  Vineet Goel

IPC: G06T3/40 ,  G06T3/4046 ,  G06T3/4053 ,  G06T3/4069

CPC classification number: G06T3/4046 ,  G06T3/4053 ,  G06T3/4069

Abstract: A processing device is provided which includes memory and a processor. The processor is configured to receive an input image having a first resolution, generate at least one linear down-sampled version of the input image via a linear upscaling network, generate at least one non-linear down-sampled version of the input image via a non-linear upscaling network, extract a first feature map from the at least one linear down-sampled version of the input image, and extract a second feature map from the at least one non-linear down-sampled version of the input image. The processor is also configured to convert the at least one linear down-sampled version of the input image and the at least one non-linear down-sampled version of the input image into pixels of an output image having a second resolution higher than the first resolution using the first feature map and the second feature map.

公开(公告)号：US20240126552A1

公开(公告)日：2024-04-18

申请号：US18393657

申请日：2023-12-21

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： JOHN KALAMATIANOS ,  MICHAEL T. CLARK ,  MARIUS EVERS ,  WILLIAM L. WALKER ,  PAUL MOYER ,  JAY FLEISCHMAN ,  JAGADISH B. KOTRA

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/52

CPC classification number: G06F9/30181 ,  G06F9/30043 ,  G06F9/30098 ,  G06F9/30138 ,  G06F9/3834 ,  G06F9/3877 ,  G06F9/52

Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.

公开(公告)号：US11960813B2

公开(公告)日：2024-04-16

申请号：US17562833

申请日：2021-12-27

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Rajagopalan Venkatramani ,  Renato Dimatula Gaddi ,  Liane Martinez ,  Warren Alexander Santos ,  Dennis Glenn Lozanta Surell

IPC: G06F30/3953 ,  G06F30/398

CPC classification number: G06F30/3953 ,  G06F30/398

Abstract: A system and method for automatically generating placement of vias within redistribution layers of a semiconductor package are described. In various implementations, a user defines attributes to use for automatic via generation in redistribution layers of a semiconductor package. The circuitry of a processor of a computing device used by the user executes instructions of an automatic redistribution layer (RDL) via generator. The automatic via generator uses the attributes, data indicative of the RDL netlist of signal routes within the RDL, and RDL mask layout data representing the signal masks of the metal layers within the RDL. The processor generates placement of vias for in the RDL based on the attributes and an identification of overlapping regions between metal layers.

公开(公告)号：US11955138B2

公开(公告)日：2024-04-09

申请号：US16355676

申请日：2019-03-15

Applicant: Advanced Micro Devices, Inc.

Inventor： A Srinivas

IPC: G10L15/22 ,  G10L25/21 ,  G10L25/84 ,  G10L25/90

CPC classification number: G10L25/84 ,  G10L15/22 ,  G10L25/21 ,  G10L25/90

Abstract: Methods, devices, and systems for voice activity detection. An audio signal is received by receiver circuitry. A pitch analysis is performed on the received audio signal by pitch analysis circuitry. A higher-order statistics analysis is performed on the audio signal by statistics analysis circuitry. Logic circuitry determines, based on the pitch analysis and the higher-order statistics analysis, whether the audio signal includes a voice region. The logic circuitry outputs a signal indicating that the audio signal includes voice if the audio signal was determined to include a voice region or indicating that the audio signal does not include voice if the audio signal was determined not to include a voice region.

公开(公告)号：US20240114664A1

公开(公告)日：2024-04-04

申请号：US17956813

申请日：2022-09-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ROBERT EDWARD RADKE

IPC: H05K7/20 ,  F16F1/18 ,  G06F1/20

CPC classification number: H05K7/2049 ,  F16F1/18 ,  G06F1/20 ,  H05K7/20254 ,  G06F2200/201

Abstract: An apparatus for component cooling includes a manifold and a heat transfer element configured to be thermally coupled to a heat-generating component. The apparatus further includes a first spring mechanism between the manifold and the heat transfer element. The first spring mechanism is configured to apply a first force to the heat transfer element.

公开(公告)号：US20240114105A1

公开(公告)日：2024-04-04

申请号：US17957662

申请日：2022-09-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Rajy Meeyakhan Rawther

IPC: H04N1/60

CPC classification number: H04N1/6027 ,  H04N1/6005

Abstract: A processing device and method for executing a color twist operation are provided. The processing device comprises memory and a processor configured to convert values of pixels of a frame from a first color domain to a hue, saturation and value (HSV) color domain, adjust hue values and saturation values of the pixels, store the adjusted hue and saturation values in a portion of the memory local to the processor and convert the frame from the HSV color domain to the first color domain using the adjusted hue and saturation values stored in local memory. The adjusted hue and saturation values are generated from pre-adjusted values, which are generated from masked vector values.

公开(公告)号：US20240113875A1

公开(公告)日：2024-04-04

申请号：US17956587

申请日：2022-09-29

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Norman Vernon Douglas Stewart ,  Mihir Shaileshbhai Doctor ,  Omar Fakhri Ahmed ,  Hemaprabhu Jayanna ,  John Traver

IPC: H04L9/08

CPC classification number: H04L9/0894

Abstract: A method and apparatus for storing keys in a key storage block includes processing a key request. A first key is allocated based upon the key request. The first key is stored in the key storage block, wherein the first key is of a first size and includes a first rule.