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公开(公告)号：US20190191536A1
公开(公告)日：2019-06-20
申请号：US16285615
申请日：2019-02-26
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics Application GmbH , STMicroelectronics S.r.l.
Inventor： Philippe SIRITO-OLIVIER , Giovanni Luca TORRISI , Manuel GAERTNER , Fritz BURKHARDT
CPC classification number: H05B39/02 , B60Q1/00 , B60Q3/80 , H05B33/0806 , H05B33/0815 , H05B39/047
Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
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公开(公告)号：US10326482B2
公开(公告)日：2019-06-18
申请号：US16003623
申请日：2018-06-08
Applicant: STMicroelectronics (Alps) SAS
Inventor： Herve Jacob
Abstract: A transmission chain receives an incident signal to be transmitted having a first power and a first bandwidth. A first modulator frequency shifts a first signal derived from the incident signal to generate a first shifted signal at a modulation output. A power amplifier coupled to the modulation output amplifies an intermediate signal to generate an amplified output signal. A predistortion-signal-generating circuit generates, from the incident signal and from the amplified output signal in a second bandwidth that is larger than the first bandwidth, a predistortion signal having a second power lower than the first power. A second modulator frequency shifts a second signal derived from the predistortion signal to generate a second shifted signal for combination with the first shifted signal at said modulation output to produce the intermediate signal.
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公开(公告)号：US20190173427A1
公开(公告)日：2019-06-06
申请号：US16207751
申请日：2018-12-03
Inventor： Benoit MARCHAND , Francois DRUILHE
Abstract: A quartz crystal resonator is coupled to an electronic circuit. A capacitive or resistive element is provided for adjusting a frequency of the quartz crystal resonator on activation or deactivation of a function of a circuit. Control is made according to a model of an expected variation of a temperature of the quartz crystal resonator.
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公开(公告)号：US10264353B2
公开(公告)日：2019-04-16
申请号：US15473812
申请日：2017-03-30
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics Design and Application S.R.O. , STMicroelectronics (Alps) SAS
Inventor： Jean Claude Bini , Dragos Davidescu , Igor Cesko , Jonathan Cottinet
Abstract: Several first digital streams of first digital samples at a first sampling frequency are processed to issue corresponding stream that are converted into second digital streams sampled at a second sampling frequency lower than said first sampling frequency. At least one delay to be applied to at least one first digital stream to satisfy a condition on the second digital streams is determined and applied to at least one first digital stream before converting. The converting operation performed is decimation filtering of the first digital streams. The application of the at least one delay to at least one first steam involves skipping a number of first digital samples in the at least one first digital stream. The number skipped depends on the value of the at least one delay. Samples that are skipped are not delivered for decimation filtering.
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公开(公告)号：US10116037B2
公开(公告)日：2018-10-30
申请号：US15668816
申请日：2017-08-04
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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Patent Agency Ranking
公开(公告)号：US20180310390A1
公开(公告)日：2018-10-25
申请号：US15957578
申请日：2018-04-19
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics S.r.l. , STMicroelectronics Application GmbH
Inventor： Philippe SIRITO-OLIVIER , Giovanni Luca TORRISI , Manuel GAERTNER , Fritz BURKHARDT
CPC classification number: H05B39/02 , B60Q1/00 , B60Q3/80 , H05B33/0806 , H05B33/0815 , H05B39/047
Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
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公开(公告)号：US10103079B2
公开(公告)日：2018-10-16
申请号：US15659078
申请日：2017-07-25
Inventor： Yvon Imbs , Laurent Schwarz , David Auchere , Laurent Marechal
IPC: H01L23/48 , H01L23/31 , H01L21/56 , H01L21/768 , H01L21/3105 , H01L23/498 , H01L23/66 , H01L23/00
Abstract: An electronic device includes a supporting substrate having a front mounting face and an electrical connection network. An integrated circuit chip is mounted to the mounting face and is electrically connected to the electrical connection network. A primary encapsulation block embeds the integrated circuit chip and extends above and around the integrated circuit chip on the mounting face of the supporting substrate. An opening is provided in the primary encapsulation block to at least partially uncover an electrical contact. An additional wire made from an electrically conductive material has an end that is electrically connected to the electrical contact. An additional encapsulation block above the primary encapsulation block embeds the additional wire.
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公开(公告)号：US10014834B1
公开(公告)日：2018-07-03
申请号：US15393550
申请日：2016-12-29
Applicant: STMicroelectronics (Alps) SAS
Inventor： Vratislav Michal , Denis Cottin , Patrik Arno , Nicolas Marty
Abstract: An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.
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公开(公告)号：US09905262B2
公开(公告)日：2018-02-27
申请号：US14918614
申请日：2015-10-21
Inventor： Jonathan Cottinet , Jean Claude Bini
CPC classification number: G11B20/10222 , G06F3/165 , H04B15/04 , H04B2215/065 , H04L7/04
Abstract: A method for transmitting and/or receiving a potential aggressor audio signal includes a transmission and/or a reception of successive groups of data timed by a first clock signal within respective successive frames synchronized by a second clock signal. In the presence of a risk of interference of the potential aggressor audio signal with a different, potential victim, signal, during the transmission or reception of the potential aggressor audio signal, the frequency of the first clock signal is modified while keeping the frequency of the second clock signal unchanged.
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公开(公告)号：US09754851B2
公开(公告)日：2017-09-05
申请号：US15050253
申请日：2016-02-22
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
IPC: H01L23/48 , H01L23/31 , H01L21/56 , H01L23/66 , H01Q1/22 , H01L21/3105 , H01L21/48 , H01L23/498
CPC classification number: H01Q1/2283 , H01L21/3105 , H01L21/4853 , H01L21/56 , H01L23/3121 , H01L23/3135 , H01L23/315 , H01L23/49838 , H01L23/66 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01L2924/1815
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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