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公开(公告)号：US10177902B2
公开(公告)日：2019-01-08
申请号：US15616549
申请日：2017-06-07
Applicant: Stichting IMEC Nederland
Inventor： Alex Young
Abstract: Systems and methods for processing data including a first and second component are described. An example circuit includes a processing stage arranged to calculate absolute values of the first component and the second component, and to output, at a first output, a maximum value of the absolute value of the first component and the absolute value of the second component, and, at a second output, a minimum value of the absolute value of the first component and the absolute value of the second component. The circuit includes a processing stage arranged to output, in response to the maximum value being greater than the minimum value times four, a value corresponding to the maximum value, and to output, in response to the maximum value being smaller than the minimum value times four, a value corresponding to a sum of seven times the maximum value and four times the minimum value.
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公开(公告)号：US20180341328A1
公开(公告)日：2018-11-29
申请号：US15984537
申请日：2018-05-21
Applicant: Stichting IMEC Nederland
Inventor： Carlos AGELL , Pierluigi CASALE , Gabriel SQUILLACE
Abstract: A method for monitoring an eye position, comprises: capturing (202) a sequence of digital images of an eye; acquiring (204) a sequence of biosignal data representing eye movements; determining (206) a set of reference eye positions based on the sequence of digital images; and determining (208) a set of intermediate eye positions based on said set of reference eye positions and said sequence of biosignal data, said set of intermediate eye positions representing eye positions relative to said set of reference eye positions, wherein the set of intermediate eye positions represents eye positions between consecutive pairs of images of said sequence of digital images.
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公开(公告)号：US20180302034A1
公开(公告)日：2018-10-18
申请号：US15952848
申请日：2018-04-13
Applicant: Stichting IMEC Nederland
Inventor： Ming Ding
Abstract: A crystal oscillator circuit comprises: a crystal oscillator; and an injection frequency generating circuit, the injection frequency generating circuit being configured to sense a signal of the crystal oscillator and amplify the sensed signal, the injection frequency generating circuit being further configured to inject the amplified signal to the crystal oscillator; wherein the crystal oscillator circuit is configured such that the crystal oscillator receives the amplified signal during an initial start-up period of the crystal oscillator and stops receiving the amplified signal at an end of the initial start-up period.
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公开(公告)号：US10095317B2
公开(公告)日：2018-10-09
申请号：US15380110
申请日：2016-12-15
Applicant: Stichting IMEC Nederland
IPC: G06F3/01 , G06F3/0346 , G06F1/16
Abstract: A system for hand gesture detection is provided, comprising: a wrist wear adapted to be worn about a wrist of a user of the system and including a set of skin electrodes adapted to face the wrist; an impedance measurement circuit adapted to measure at least a first impedance in a first portion of the wrist and a second impedance in a second portion of the wrist which second portion is circumferentially displaced in relation to said first portion, wherein the first impedance is measured via a first electrode group including four skin electrodes of said set of skin electrodes and the second impedance is measured via a second electrode group including four skin electrodes of said set of skin electrodes, and a processing circuit adapted to detect a hand gesture of the user based on the first and the second impedance measured by the impedance measurement circuit.
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公开(公告)号：US10050638B2
公开(公告)日：2018-08-14
申请号：US15835310
申请日：2017-12-07
Applicant: Stichting IMEC Nederland
Inventor： Ming Ding , Pieter Harpe , Hanyue Li
IPC: H03M1/10
CPC classification number: H03M1/1009 , H03M1/1014 , H03M1/44 , H03M1/46
Abstract: A method of gain calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB), analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB), determining an indication of a presence of gain error in the gain module, and calibrating the gain error. As the determination of the calibration bit (B*LSB) requires only one additional comparison, as compared to normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
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Patent Agency Ranking
公开(公告)号：US20180172620A1
公开(公告)日：2018-06-21
申请号：US15840569
申请日：2017-12-13
Applicant: Stichting IMEC Nederland
Inventor： Marcel Zevenbergen , Martijn Goedbloed
IPC: G01N27/333 , G01N27/416
CPC classification number: G01N27/3335 , G01N27/333 , G01N27/4161
Abstract: A micromachined ion-selective electrode for an ion-selective sensor is provided. The ion-selective electrode includes a reservoir that is arranged to contain electrolyte, a contacting electrode that is arranged at least partially within the reservoir to contact electrolyte in the reservoir, and an ion-selective membrane that is arranged to contact a bulk solution under test. The ion-selective electrode further includes a constriction for providing an ionic connection between the bulk solution and electrolyte in the reservoir via the ion-selective membrane. Also provided is an ion-selective sensor that includes at least one such micromachined ion-selective electrode.
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公开(公告)号：US20180167079A1
公开(公告)日：2018-06-14
申请号：US15835373
申请日：2017-12-07
Applicant: Stichting IMEC Nederland
Inventor： Ming Ding , Hanyue Li , Pieter HARPE
CPC classification number: H03M1/1023 , H03M1/1014 , H03M1/44 , H03M1/46 , H03M1/462 , H03M1/466
Abstract: A method of offset calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration bit (B*LSB; B*MSB), analyzing a bit of the digital signal (COUT) and the calibration bit (B*LSB; B*MSB), determining an indication of a presence of offset error, and calibrating the offset error. As the determination of the calibration bit (B*LSB; B*MSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and thus can be performed frequently thereby taking into account time-varying changes due to environmental effects.
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公开(公告)号：US20180165395A1
公开(公告)日：2018-06-14
申请号：US15835214
申请日：2017-12-07
Applicant: Stichting IMEC Nederland
Inventor： Bo Liu , Tobias Gemmeke
CPC classification number: G06F17/5031 , G01R31/2882 , G06F17/5036 , G06F17/5045 , G06F17/5068 , G06F2217/10 , G06F2217/84
Abstract: A computer-implemented method for generating an advanced-on-chip-variation (AOCV) table of a cell is disclosed. In one aspect, the AOCV table contains the delay of the cell which is derived from a variation factor of a plurality of input patterns of the cell. The variation factor of each input pattern is derived from variation factors of a plurality basic elements. The variation factors of the basic elements are obtained as the result of a number of simulations. However, the number of basic elements is far lower than the number of possible cells. As such, the number of simulations that need to be performed is reduced drastically which results in a faster method.
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公开(公告)号：US20180062660A1
公开(公告)日：2018-03-01
申请号：US15688513
申请日：2017-08-28
Applicant: Stichting IMEC Nederland
Inventor： Johan van den Heuvel , Yao-Hong Liu
CPC classification number: H03L7/087 , G04F10/005 , H03L7/085 , H03L7/091 , H03L7/1976 , H03L2207/50
Abstract: The present disclosure relates to a Digital Phase Locked Loop (DPLL) for phase locking an output signal to a reference clock signal. The DPLL comprises a phase detector for detecting a phase error of a feedback signal with respect to the reference clock signal. The DPLL comprises a digitally controlled oscillator for generating the output signal based at least on a frequency control word and at least one control signal representative of the phase error. The phase detector comprises an integer circuit for generating a first control signal representative of an integer phase error. The phase detector comprises a fractional circuit comprising a Time-to-Digital Converter (TDC) for processing the feedback signal and a delayed reference clock signal. The fractional circuit is provided for generating from the TDC output a second control signal representative of a fractional phase error. The DPLL comprises an unwrapping unit for unwrapping the TDC output.
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公开(公告)号：US20170366334A1
公开(公告)日：2017-12-21
申请号：US15616549
申请日：2017-06-07
Applicant: Stichting IMEC Nederland
Inventor： Alex Young
CPC classification number: H04L7/0331 , G06F7/548 , H04L7/0087 , H04L7/0334
Abstract: Systems and methods for processing data including a first and second component are described. An example circuit includes a processing stage arranged to calculate absolute values of the first component and the second component, and to output, at a first output, a maximum value of the absolute value of the first component and the absolute value of the second component, and, at a second output, a minimum value of the absolute value of the first component and the absolute value of the second component. The circuit includes a processing stage arranged to output, in response to the maximum value being greater than the minimum value times four, a value corresponding to the maximum value, and to output, in response to the maximum value being smaller than the minimum value times four, a value corresponding to a sum of seven times the maximum value and four times the minimum value.
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