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151.发明授权公开(公告)号：US10326537B2
公开(公告)日：2019-06-18
申请号：US15376609
申请日：2016-12-12
Applicant: Silicon Laboratories Inc.
Inventor： Daniel Højrup Johansen
Abstract: In embodiments of the present invention improved capabilities are described for an antenna-based detection method and system for sensing an environmental change condition. The method and system is adapted such that the states comprising the environmental change condition are capable of being determined at the location of the detection point utilizing only the magnitude component of the antenna impedance as altered by the discrete change in the environmental condition.
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公开(公告)号：US10326375B1
公开(公告)日：2019-06-18
申请号：US15835234
申请日：2017-12-07
Applicant: Silicon Laboratories Inc.
Inventor： Krishna Pentakota , Mohammad Al-Shyoukh , Stefan N. Mastovich
IPC: H04L7/00 , H02M3/335 , G01R19/18 , H01L21/48 , H01L23/498 , H01L23/66 , H03F3/213 , H03F3/195 , H02M7/537 , H01L23/64 , H01F19/08
Abstract: An isolated power transfer device has a primary side and a secondary side isolated from the primary side by an isolation barrier. A secondary-side circuit includes a rectifier circuit coupled to a secondary-side conductive coil. The secondary-side circuit includes a first resistor coupled to a first power supply node and a terminal node. The secondary-side circuit includes a second resistor coupled to the terminal node and a second power supply node. The secondary-side circuit includes a first circuit to generate a feedback signal in response to a reference voltage and a signal on the terminal node. The feedback signal has a hysteretic band defined by the first resistor and the second resistor. The secondary-side circuit is configured as an AC/DC power converter that provides, on the first power supply node, an output DC signal having a voltage level based on a ratio of the first resistor to the second resistor.
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公开(公告)号：US10312955B1
公开(公告)日：2019-06-04
申请号：US15859894
申请日：2018-01-02
Applicant: Silicon Laboratories Inc.
Inventor： Hendricus de Ruijter , Ping Xiong
Abstract: A method compensates for a frequency error in a communications system. The method includes detecting a received preamble sequence in a received signal. The received preamble sequence is detected based on a plurality of power estimates corresponding to a plurality of frequency bins of a received frequency domain signal and a plurality of relative phase errors corresponding to the plurality of frequency bins of the received frequency domain signal. The method includes determining the frequency error using the received preamble sequence. The method includes adjusting the receiver based on the frequency error.
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公开(公告)号：US10296026B2
公开(公告)日：2019-05-21
申请号：US14918651
申请日：2015-10-21
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Vaibhav Karkare
Abstract: A low-noise voltage reference generator that utilizes internal gain and feedback to generate an output signal having reduced sensitivity to power supply variations and loading conditions is described. A method includes generating a current based on a voltage drop across a resistor. The voltage drop is based on a second voltage drop across a gate terminal of a transistor and a source terminal of the transistor. The method includes the current using a reference voltage to generate a mirrored current through a node coupled to the drain terminal of the transistor. The method includes generating a level-shifted voltage using a voltage on the node. The method includes buffering the level-shifted voltage using a power supply voltage to generate the reference voltage.
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公开(公告)号：US10289840B2
公开(公告)日：2019-05-14
申请号：US15612841
申请日：2017-06-02
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Sebastian Ahmed , Lars Lydersen
Abstract: An integrated circuit includes a tamper sensor that has plurality of state circuits. Each of the plurality of state circuits has a respective output that provides a respective logic state. When operating properly, the respective logic state is toggled in response to a clock signal. The respective logic state fails to toggle in response to a respective fault injection. The tamper sensor has an output that provides a fault signal in response to a difference in the respective logic state of the plurality of state circuits. Additionally, the integrated circuit includes a protected circuit, as well as a tamper response circuit. The tamper response circuit is connected to the tamper sensor and to the protected circuit. The tamper response circuit executes a protection operation to secure the protected circuit in response to the fault signal.
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Patent Agency Ranking
156.发明授权公开(公告)号：US10256858B1
公开(公告)日：2019-04-09
申请号：US15707306
申请日：2017-09-18
Applicant: Silicon Laboratories Inc.
Inventor： Alexander August Arthur Hakkola
Abstract: In one embodiment, an apparatus includes: a first radio receiver to receive and downconvert a first radio frequency (RF) signal to a first digital signal; a second radio receiver to receive and downconvert a second RF signal to a second digital signal; a correlation circuit to receive the first and second digital signals and determine a correlation between the first and second digital signals; a weight calculation circuit to determine a first weight value and a second weight value based at least in part on the correlation; and a combiner circuit to combine the first and second digital signals according to the first and second weight values.
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公开(公告)号：US10254176B2
公开(公告)日：2019-04-09
申请号：US14246461
申请日：2014-04-07
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Jeffrey L. Sonntag
Abstract: An apparatus includes a thermistor having a variable resistance with a first dependence on absolute temperature. The apparatus includes a reference resistor having a resistance with a second dependence on absolute temperature, the second dependence being less than or having opposite polarity to the first dependence. The reference resistor includes a switched-capacitor circuit. The apparatus includes a node coupled between the thermistor and the reference resistor. The node is configured to provide a signal indicative of absolute temperature based on the variable resistance and the reference resistance. The signal may be strain-invariant, proportional to a reference voltage, and indicative of a ratio of the variable resistance to the reference resistance. The apparatus may include a feedback circuit configured to maintain the node at a predetermined voltage level.
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公开(公告)号：US10222421B1
公开(公告)日：2019-03-05
申请号：US15896678
申请日：2018-02-14
Applicant: Silicon Laboratories Inc.
Inventor： Mudit Srivastava , Raghavendra Pai Kateel , Shantonu Bhadury
IPC: G01R31/3185 , G01R31/10 , G01R31/28 , G01R31/3177
Abstract: Embodiments are disclosed for systems and methods that include pulsing a clock pin of retention cells included within a scan chain to shift a sequence of logic values into the scan chain, so that successive cells are loaded with opposite logic values. Embodiments also include pulsing a retain pin to retain the logic values, and pulsing the clock pin to shift the sequence of logic values through the chain, so that retained logic values are output from, and logic values opposite to the retained logic values are loaded into, the cells. Embodiments also include pulsing a restore pin to restore the retained logic values, pulsing the clock pin to shift the logic values out of the scan chain, comparing the logic values shifted out of the scan chain with the logic values shifted into the scan chain, and detecting a fault on the retain pin based on said comparison.
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公开(公告)号：US10218387B2
公开(公告)日：2019-02-26
申请号：US15589199
申请日：2017-05-08
Applicant: Silicon Laboratories Inc.
Inventor： Thomas S. David
Abstract: A system and method of utilizing ECC memory to detect software errors and malicious activities is disclosed. In one embodiment, after a pool of memory is freed, every data word in that pool is modified to ensure that an ECC error will occur if any data word in that pool is read again. In another embodiment, the ECC memory controller is used to detect and prevent non-secure applications from accessing secure portions of memory.
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公开(公告)号：US10177781B2
公开(公告)日：2019-01-08
申请号：US13925781
申请日：2013-06-24
Applicant: Silicon Laboratories Inc.
Inventor： Louis Nervegna , Bruce Del Signore
Abstract: A method includes selectively coupling first and second input nodes of a capacitive bridge to first and second voltages, respectively, and selectively coupling first and second output nodes of the capacitive bridge to first and second output terminals, respectively, during a first phase of a clock cycle. The method further includes selectively coupling the first and second input nodes to the second and first voltages, respectively, and selectively coupling the first and second output nodes to the second and first output terminals, respectively, during a second phase of the clock cycle.
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