IGBT with fast reverse recovery time rectifier and manufacturing method thereof
    161.
    发明授权
    IGBT with fast reverse recovery time rectifier and manufacturing method thereof 有权
    具有快速反向恢复时间整流器的IGBT及其制造方法

    公开(公告)号:US08242537B2

    公开(公告)日:2012-08-14

    申请号:US12615278

    申请日:2009-11-10

    CPC classification number: H01L29/7397 H01L29/0834 H01L29/1095 H01L29/66348

    Abstract: An IGBT with a fast reverse recovery time rectifier includes an N-type drift epitaxial layer, a gate, a gate insulating layer, a P-type doped base region, an N-type doped source region, a P-type doped contact region, and a P-type lightly doped region. The P-type doped base region is disposed in the N-type drift epitaxial layer, and the P-type doped contact region is disposed in the N-type drift epitaxial layer. The P-type lightly doped region is disposed between the P-type contact doped region and the N-type drift epitaxial layer, and is in contact with the N-type drift epitaxial layer.

    Abstract translation: 具有快速反向恢复时间整流器的IGBT包括N型漂移外延层,栅极,栅极绝缘层,P型掺杂基极区域,N型掺杂源极区域,P型掺杂接触区域, 和P型轻掺杂区域。 P型掺杂基区设置在N型漂移外延层中,P型掺杂接触区设置在N型漂移外延层中。 P型轻掺杂区域设置在P型接触掺杂区域和N型漂移外延层之间,并与N型漂移外延层接触。

    Method of manufacturing semiconductor device having integrated MOSFET and Schottky diode
    162.
    发明授权
    Method of manufacturing semiconductor device having integrated MOSFET and Schottky diode 有权
    具有集成MOSFET和肖特基二极管的半导体器件的制造方法

    公开(公告)号:US08241978B2

    公开(公告)日:2012-08-14

    申请号:US12536504

    申请日:2009-08-06

    CPC classification number: H01L27/0629 H01L29/8725

    Abstract: A semiconductor device having integrated MOSFET and Schottky diode includes a substrate having a MOSFET region and a Schottky diode region defined thereon; a plurality of first trenches formed in the MOSFET region; and a plurality of second trenches formed in the Schottky diode region. The first trenches respectively including a first insulating layer formed over the sidewalls and bottom of the first trench and a first conductive layer filling the first trench serve as a trenched gate of the trench MOSFET. The second trenches respectively include a second insulating layer formed over the sidewalls and bottom of the second trench and a second conductive layer filling the second trench. A depth and a width of the second trenches are larger than that of the first trenches; and a thickness of the second insulating layer is larger than that of the first insulating layer.

    Abstract translation: 具有集成MOSFET和肖特基二极管的半导体器件包括其上限定有MOSFET区和肖特基二极管区的衬底; 形成在所述MOSFET区域中的多个第一沟槽; 以及形成在肖特基二极管区域中的多个第二沟槽。 分别包括形成在第一沟槽的侧壁和底部上的第一绝缘层的第一沟槽和填充第一沟槽的第一导电层用作沟槽MOSFET的沟槽栅极。 第二沟槽分别包括形成在第二沟槽的侧壁和底部上的第二绝缘层和填充第二沟槽的第二导电层。 第二沟槽的深度和宽度大于第一沟槽的深度和宽度; 并且所述第二绝缘层的厚度大于所述第一绝缘层的厚度。

    POWER SEMICONDUCTOR DEVICE WITH ELECTROSTATIC DISCHARGE STRUCTURE AND MANUFACTURING METHOD THEREOF
    163.
    发明申请
    POWER SEMICONDUCTOR DEVICE WITH ELECTROSTATIC DISCHARGE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
    具有静电放电结构的功率半导体器件及其制造方法

    公开(公告)号:US20120193701A1

    公开(公告)日:2012-08-02

    申请号:US13101155

    申请日:2011-05-05

    Applicant: Wei-Chieh Lin

    Inventor: Wei-Chieh Lin

    Abstract: A power semiconductor device with an electrostatic discharge (ESD) structure includes an N-type semiconductor substrate, at least one ESD device, and at least one trench type transistor device. The N-type semiconductor has at least two trenches, and the ESD device is disposed in the N-type semiconductor substrate between the trenches. The ESD device includes a P-type first doped region, and an N-type second doped region and an N-type third doped region disposed in the P-type first doped region. The N-type second doped region is electrically connected to a gate of the trench type transistor device, and the N-type third doped region is electrically connected to a drain of the trench type transistor device.

    Abstract translation: 具有静电放电(ESD)结构的功率半导体器件包括N型半导体衬底,至少一个ESD器件和至少一个沟槽型晶体管器件。 N型半导体具有至少两个沟槽,并且ESD元件设置在沟槽之间的N型半导体衬底中。 ESD器件包括P型第一掺杂区域和设置在P型第一掺杂区域中的N型第二掺杂区域和N型第三掺杂区域。 N型第二掺杂区域电连接到沟槽型晶体管器件的栅极,并且N型第三掺杂区域电连接到沟槽型晶体管器件的漏极。

    METHOD AND APPARATUS FOR MONITORING AND CONTROLLING A HOUSEHOLD APPLIANCE STANDBY STATE
    166.
    发明申请
    METHOD AND APPARATUS FOR MONITORING AND CONTROLLING A HOUSEHOLD APPLIANCE STANDBY STATE 有权
    家用电器待机状态监控方法与装置

    公开(公告)号:US20120161922A1

    公开(公告)日:2012-06-28

    申请号:US13115046

    申请日:2011-05-24

    CPC classification number: H02J9/005 Y10T307/76

    Abstract: A method for monitoring and controlling a household appliance is provided. The method has the steps of: monitoring and sampling the power of the household appliance to obtain a first standby power range; monitoring and sampling the power of the household appliance to obtain a set of first real-time power data; calculating a first standby confidence level based on the number of times that the first real-time power data fall within the first standby power range; and determining that the household appliance is in a standby state if the first standby confidence level is greater than or equal to a standby confidence level threshold.

    Abstract translation: 提供了一种家用电器的监控方法。 该方法具有以下步骤:对家用电器的功率进行监测和采样,获得第一待机功率范围; 对家用电器的功率进行监测和采样,以获得一组第一实时功率数据; 基于所述第一实时功率数据落入所述第一备用功率范围内的次数计算第一待机置信度; 以及如果所述第一备用置信水平大于或等于待机置信水平阈值,则确定所述家用电器处于待机状态。

    DATA SYNCHRONZATION SYSTEM AND METHOD FOR WIDGET AND CORRESPONDING APPLICATION
    167.
    发明申请
    DATA SYNCHRONZATION SYSTEM AND METHOD FOR WIDGET AND CORRESPONDING APPLICATION 审中-公开
    数据同步系统和方法,用于宽带和对应应用

    公开(公告)号:US20120159361A1

    公开(公告)日:2012-06-21

    申请号:US13172163

    申请日:2011-06-29

    Applicant: TING-CHIEH LIN

    Inventor: TING-CHIEH LIN

    CPC classification number: G06F9/451

    Abstract: A synchronization system for a widget and a corresponding application includes a display and a processor. The processor includes a background management module, an application window module, a widget, and a widget management module. The application layer is adapted to store application data, and tell the background management module to download updated data corresponding to the application via a network, after determining a storage time of the application data is greater than a reference time. The application window module is adapted to obtain the application data or the updated data from the application layer and display the application data or the updated data. The widget is displayed. The widget management module is adapted to obtain the widget data of the application data or the updated data from the application layer and send the widget data to the widget.

    Abstract translation: 用于小部件和相应应用的同步系统包括显示器和处理器。 处理器包括后台管理模块,应用程序窗口模块,小部件和小部件管理模块。 应用层适于存储应用数据,并且在确定应用数据的存储时间大于参考时间之后,通过网络通知后台管理模块下载与应用相对应的更新数据。 应用窗口模块适于从应用层获取应用数据或更新的数据,并显示应用数据或更新的数据。 将显示窗口小部件。 小部件管理模块适于从应用层获得应用数据的小部件数据或更新的数据,并将小部件数据发送到小部件。

    Pharyngeal intubation guiding device
    168.
    发明授权
    Pharyngeal intubation guiding device 失效
    咽喉插管引导装置

    公开(公告)号:US08202215B2

    公开(公告)日:2012-06-19

    申请号:US12704175

    申请日:2010-02-11

    Abstract: A pharyngeal intubation guiding device includes lengthwise extending tongue-side and palate-side walls that cooperatively define a guiding duct. The tongue-side wall is configured to conform to the rear end of a patient's tongue to permit the guiding duct to confront the opening of the patient's larynx. The palate-side wall has an outer contour which establishes a guideway towards the opening of the patient's esophagus. A lengthwise extending laryngoscope guiding channel and a lengthwise extending endotracheal tube guiding groove are disposed in the guiding duct. A viewing window is disposed to define a terminal end of the laryngoscope guiding channel. The endotracheal tube guiding groove has a lead-in port to permit an endotracheal tube introduced therein to be removable laterally. A lengthwise extending conduit is disposed in the guiding duct to permit an aspirator tube to reach the patient's trachea to suck out phlegm.

    Abstract translation: 咽喉插管引导装置包括协同地限定引导管的纵向延伸的舌侧和上颚侧壁。 舌侧壁构造成符合患者舌头的后端,以允许导管面对患者喉部的开口。 腭侧壁具有外部轮廓,其形成朝向患者食道开口的导轨。 纵向延伸的喉镜引导通道和纵向延伸的气管插管引导槽设置在引导管中。 设置观察窗口以限定喉镜引导通道的终端。 气管导管引导槽具有导入口以允许导入其中的气管内导管横向移除。 纵向延伸的管道设置在引导管道中,以允许吸气管到达病人的气管以吸出痰。

    DEPLETION MODE TRENCH SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    170.
    发明申请
    DEPLETION MODE TRENCH SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    分离模式TRENCH半导体器件及其制造方法

    公开(公告)号:US20120139037A1

    公开(公告)日:2012-06-07

    申请号:US13091160

    申请日:2011-04-21

    Abstract: A manufacturing method of a depletion mode trench semiconductor device includes following steps. Firstly, a substrate including a drift epitaxial layer disposed thereon is provided. A trench is disposed in the drift epitaxial layer. A gate dielectric layer is formed on an inner sidewall of the trench and an upper surface of the drift epitaxial layer. A base doped region is formed in the drift epitaxial layer and adjacent to a side of the trench. A thin doped region is formed and conformally contacts the gate dielectric layer. A gate material layer is formed to fill the trench. A source doped region is formed in the base doped region, and the source doped region overlaps the thin doped region at a side of the trench. Finally, a contact doped region is formed to overlap the thin doped region, and the contact doped region is adjacent to the source doped region.

    Abstract translation: 耗尽型沟槽半导体器件的制造方法包括以下步骤。 首先,提供包括设置在其上的漂移外延层的衬底。 沟槽设置在漂移外延层中。 栅极电介质层形成在沟槽的内侧壁和漂移外延层的上表面上。 基极掺杂区域形成在漂移外延层中并与沟槽的一侧相邻。 形成薄的掺杂区域并保形地接触栅极电介质层。 形成栅极材料层以填充沟槽。 源极掺杂区域形成在基极掺杂区域中,并且源极掺杂区域与沟槽侧面的薄掺杂区域重叠。 最后,形成接触掺杂区域以与薄掺杂区域重叠,并且接触掺杂区域与源极掺杂区域相邻。

Patent Agency Ranking