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公开(公告)号：US10917106B2
公开(公告)日：2021-02-09
申请号：US16709391
申请日：2019-12-10
Applicant: STMicroelectronics SA , STMicroelectronics (Alps) SAS
Inventor： Stephane Le Tual , Jean-Pierre Blanc , David Duperray
Abstract: An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.
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公开(公告)号：US10670666B2
公开(公告)日：2020-06-02
申请号：US16047743
申请日：2018-07-27
Applicant: STMicroelectronics (Alps) SAS
Inventor： Bruno Leduc , Pascal Bernon , Stephane Clin
IPC: G01R31/40 , G01R19/165 , G01R3/00 , G01R15/14
Abstract: A circuit includes, in series between a first terminal and a second terminal of application of a power supply voltage, and first and second branches. The first branch includes a first transistor and a first current source coupled to the first transistor. The second branch includes a resistive element, a second transistor coupled to the resistive element and forming a current mirror with the first transistor and a second current source coupled to the second transistor. The resistive element conditions a threshold of detection of a variation of the power supply voltage.
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公开(公告)号：US10560020B2
公开(公告)日：2020-02-11
申请号：US16103582
申请日：2018-08-14
Applicant: STMicroelectronics (Alps) SAS
Inventor： Alexandre Pons
Abstract: A method can be used for compensating a voltage drop on a cable connected between a source device and a receiver device. The source device delivers an offset current on a channel configuration pin of the source device, the offset current causing an increase in a voltage on the channel configuration pin of the source device to a chosen reference voltage. The offset current is stored in the source device. The source device absorbs an absorption current originating from the channel configuration pin of the source device, the absorption current depending on the stored offset current and on the voltage drop. The source device generates a compensated supply voltage on a power supply pin of the source device, the compensated supply voltage equal to a reference supply voltage increased by the voltage drop to within a tolerance.
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公开(公告)号：US10524209B2
公开(公告)日：2019-12-31
申请号：US15692012
申请日：2017-08-31
Inventor： Michel Ayraud , Serge Ramet , Philippe Level
Abstract: A local oscillator device includes an oscillator module including a first inductive element and a capacitive element coupled in parallel with the inductive element. A frequency divider is coupled to the oscillator module for delivering a local oscillator signal. The local oscillator device includes an autotransformer including the first inductive element and two second inductive elements respectively coupled to the terminals of the first inductive element and to two output terminals of the autotransformer, the output terminals being further coupled to input terminals of the frequency divider.
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165.发明申请公开(公告)号：US20190260382A1
公开(公告)日：2019-08-22
申请号：US16269303
申请日：2019-02-06
Applicant: STMicroelectronics (Alps) SAS
Inventor： Laurent Vaccariello
Abstract: An N-bit type charge redistribution analog-to-digital conversion device includes an input terminal configured to receive an input signal and coupled via a line to an output terminal. The output terminal is configured to be coupled to a comparator. The device further includes three reference potential sources of different values and a network of capacitors, where a first terminal of each capacitor is coupled to the line, and where a second terminal of each capacitor is coupled to switching circuit configured for coupling the second terminal of each capacitor to one of the reference potentials.
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Patent Agency Ranking
公开(公告)号：US20190187218A1
公开(公告)日：2019-06-20
申请号：US16269331
申请日：2019-02-06
Inventor： Vratislav Michal , Michel Ayraud
IPC: G01R31/3835 , G01R31/36 , H03F3/45 , G01R1/30 , H03F1/02
CPC classification number: G01R31/3835 , G01R1/30 , G01R17/02 , G01R31/3646 , H03F1/0205 , H03F3/45179 , H03F3/45183 , H03F2200/129 , H03F2200/261 , H03F2200/471 , H03F2203/45151
Abstract: A circuit includes an amplifier having a first power terminal configured to be coupled to a supply voltage and a second power terminal configured to be coupled to a reference potential. The circuit further includes a first impedance element coupled between a first input terminal of the amplifier and a first output terminal of the amplifier. The circuit additionally includes a second impedance element coupled between the first input terminal and the reference potential. The amplifier is configured to output a first voltage at a second output terminal of the amplifier in response to the supply voltage being greater than an output voltage at the first output terminal of the amplifier. The amplifier is further configured to output a second voltage at the second output terminal of the amplifier in response to the supply voltage being less than the output voltage at the first output terminal of the amplifier.
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公开(公告)号：US20190173426A1
公开(公告)日：2019-06-06
申请号：US16207696
申请日：2018-12-03
Inventor： Benoit MARCHAND , Francois DRUILHE
Abstract: A quartz crystal resonator is connected to an array of switchable capacitors or resistors. The switched actuation of elements of the array is controlled by bits of a control word. At least one of the bits of the control word is controlled by pulse width modulation to effectuate a tuning of the oscillation frequency of the quartz crystal resonator.
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公开(公告)号：US10257917B2
公开(公告)日：2019-04-09
申请号：US15957578
申请日：2018-04-19
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics S.r.l. , STMicroelectronics Application GmbH
Inventor： Philippe Sirito-Olivier , Giovanni Luca Torrisi , Manuel Gaertner , Fritz Burkhardt
Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
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公开(公告)号：US10056923B2
公开(公告)日：2018-08-21
申请号：US15693986
申请日：2017-09-01
Inventor： Julien Saade , Abdelaziz Goulahsen
CPC classification number: H04B1/04 , G06F13/4282 , H04L25/4908
Abstract: The invention relates to a method for serial data transmission, comprising the steps consisting in computing the running disparity (RD) of a bit stream that is being transmitted; when the running disparity reaches a threshold (T), computing a point disparity on a subsequent frame (S) of the stream; if the point disparity has the same sign as the threshold, inverting the states of the bits of the frame in the transmitted bit stream; and inserting into the transmitted bit stream a polarity bit having a state signalling the inversion.
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公开(公告)号：US10021482B2
公开(公告)日：2018-07-10
申请号：US15598100
申请日：2017-05-17
Applicant: STMicroelectronics (Alps) SAS
Inventor： Christian Fraisse , Angelo Nagari
Abstract: An audio device includes an audio amplifier configured to receive an input signal and generate a differential output signal. A first signal combiner circuit is configured to generate a time-convolution signal of an analog current signal and an analog voltage signal. The analog current signal corresponds to a current at the differential output signal, and the analog voltage signal corresponds to a voltage across the differential output signal. A second signal combiner circuit is configured to subtract the generated time-convolution signal from the input signal.
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