-
公开(公告)号:US20220006630A1
公开(公告)日:2022-01-06
申请号:US17480360
申请日:2021-09-21
Applicant: Intel Corporation
Inventor: Santosh Ghosh , Andrea Basso , Dumitru-Daniel Dinu , Avinash L. Varna , Manoj Sastry
Abstract: An apparatus comprises an input register comprising an input polynomial, a processing datapath communicatively coupled to the input register comprising a plurality of compute nodes to perform a number theoretic transform (NTT) algorithm on the input polynomial to generate an output polynomial in NTT format. The plurality of compute nodes comprises at least a first butterfly circuit to perform a series of butterfly calculations on input data and a randomizing circuitry to randomize an order of the series of butterfly calculations.
-
公开(公告)号:US11205017B2
公开(公告)日:2021-12-21
申请号:US16456339
申请日:2019-06-28
Applicant: Intel Corporation
Inventor: Vikram Suresh , Sanu Mathew , Rafael Misoczki , Santosh Ghosh , Raghavan Kumar , Manoj Sastry , Andrew H. Reinders
Abstract: Embodiments are directed to post quantum public key signature operation for reconfigurable circuit devices. An embodiment of an apparatus includes one or more processors; and a reconfigurable circuit device, the reconfigurable circuit device including a dedicated cryptographic hash hardware engine, and a reconfigurable fabric including logic elements (LEs), wherein the one or more processors are to configure the reconfigurable circuit device for public key signature operation, including mapping a state machine for public key generation and verification to the reconfigurable fabric, including mapping one or more cryptographic hash engines to the reconfigurable fabric, and combining the dedicated cryptographic hash hardware engine with the one or more mapped cryptographic hash engines for cryptographic signature generation and verification.
-
公开(公告)号:US20210385239A1
公开(公告)日:2021-12-09
申请号:US17347214
申请日:2021-06-14
Applicant: Intel Corporation
Inventor: Marcio Juliato , Liuyang Lily Yang , Manoj Sastry , Christopher Gutierrez , Shabbir Ahmed , Vuk Lesi
IPC: H04L29/06 , B60R16/023 , H04L29/08 , H04W4/48 , H04W12/122
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for anomaly detection and recovery. An apparatus to isolate a first controller in an autonomous vehicle includes a first controller to control a reference signal of the autonomous vehicle via a communication bus, a second controller to control the reference signal of the autonomous vehicle when the first controller is compromised, and a message neutralizer to neutralize messages transmitted by the first controller when the first controller is compromised, the neutralized messages to cause the first controller to become isolated from the communication bus.
-
公开(公告)号:US20210320933A1
公开(公告)日:2021-10-14
申请号:US17356033
申请日:2021-06-23
Applicant: Intel Corporation
Inventor: Marcio Juliato , Shabbir Ahmed , Christopher Gutierrez , Vuk Lesi , Manoj Sastry , Qian Wang
Abstract: Systems, apparatuses, and methods to identify bus-off and masquerade attacks against ECUs transmitting on a communication bus from behind a gateway coupled to the communication bus. The disclosure further describes systems, apparatuses, and methods to mitigate against bus-off attacks made against an ECU coupled to a communication bus through a gateway.
-
公开(公告)号:US11079241B2
公开(公告)日:2021-08-03
申请号:US15858706
申请日:2017-12-29
Applicant: Intel Corporation
Inventor: Liuyang Yang , Manoj Sastry , Yonghong Huang , Xiruo Liu , Noor Abani
IPC: G01S19/21 , H04W4/02 , G01C21/30 , H04W4/44 , H04W4/46 , G08G1/01 , G08G1/0967 , H04L29/06 , H04W12/122 , H04W4/20 , H04W12/63 , H04W12/104
Abstract: An embodiment of a semiconductor package apparatus may include technology to acquire location related information, acquire local area characteristic information, and verify the location related information based on the local area characteristic information. Other embodiments are disclosed and claimed.
-
166.
公开(公告)号:US20210119777A1
公开(公告)日:2021-04-22
申请号:US17133183
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: SANTOSH GHOSH , Marcio Juliato , Manoj Sastry
Abstract: An apparatus comprises an input register comprising a state register and a parity field, a first round secure hash algorithm (SHA) datapath communicatively coupled to the state register, comprising a first section to perform a θ step of a SHA calculation, a second section to perform a ρ step and a ρ step of the SHA calculation, a third section to perform a χ step of the SHA calculation and a fourth section to perform a τ step of the SHA calculation.
-
167.
公开(公告)号:US20210004725A1
公开(公告)日:2021-01-07
申请号:US17024232
申请日:2020-09-17
Applicant: Intel Corporation
Inventor: Shabbir Ahmed , Christopher Gutierrez , Marcio Juliato , Qian Wang , Vuk Lesi , Manoj Sastry
Abstract: Systems, apparatuses, and methods to establish ground truth for an intrusion detection system using machine learning models to identify an electronic control unit transmitting a message on a communication bus, such as an in-vehicle network bus, are provided. Voltage signatures for overlapping message identification (MID) numbers are collapsed and trained on a single ECU label.
-
公开(公告)号:US20200377057A1
公开(公告)日:2020-12-03
申请号:US16994147
申请日:2020-08-14
Applicant: Intel Corporation
Inventor: Shabbir Ahmed , Marcio Juliato , Christopher Gutierrez , Qian Wang , Vuk Lesi , Manoj Sastry
IPC: B60R25/30 , B60R25/104 , B60R25/24 , G06F21/44
Abstract: Systems, apparatuses, and methods to identify an electronic control unit transmitting a message on a communication bus, such as an in-vehicle network bus, are provided. ECUs transmit messages by manipulating voltage on conductive lines of the bus. Observation circuitry can observe voltage transitions associated with the transmission at a point on the in-vehicle network bus. A domain bitmap can be generated from the observed voltage transitions. ECUs can be identified and/or fingerprinted based on the domain bitmaps.
-
公开(公告)号:US20200372460A1
公开(公告)日:2020-11-26
申请号:US16994089
申请日:2020-08-14
Applicant: Intel Corporation
Inventor: Christopher Gutierrez , Marcio Juliato , Qian Wang , Shabbir Ahmed , Vuk Lesi , Manoj Sastry
Abstract: Systems, apparatuses, and methods to attest to and verify the integrity of cargo during transport by an autonomous vehicle are provided. An autonomous vehicle can discretize parameters associated with transportation of cargo and can generate a keyed hash digest from the discretized parameters. The keyed hash digest can be sent to a stakeholder in the transportation of the cargo to attest to the integrity of the cargo during transport.
-
公开(公告)号:US20190319805A1
公开(公告)日:2019-10-17
申请号:US16456368
申请日:2019-06-28
Applicant: Intel Corporation
Inventor: Santosh Ghosh , Manoj Sastry , Prakash Iyer , Ting Lu
Abstract: Embodiments are directed to a digital signature verification engine for reconfigurable circuit devices. An embodiment of an apparatus includes one or more processors; and a reconfigurable circuit device, the reconfigurable circuit device including digital signal processing (DSP) blocks and logic elements (LEs), wherein the one or more processors are to configure the reconfigurable circuit device to operate as a signature verification engine for a bit stream, the signature verification engine including a hybrid multiplication unit, the hybrid multiplication unit combining a set of LEs and a set of the DSPs to multiply operands for signature verification.
-
-
-
-
-
-
-
-
-