公开(公告)号：US11329007B2

公开(公告)日：2022-05-10

申请号：US16996872

申请日：2020-08-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang ,  Yan Wen Chung ,  Huei-Shyong Cho

IPC: H05K1/11 ,  H05K3/42 ,  H01L23/00 ,  H01L23/498 ,  H01L23/552 ,  H01L21/48 ,  H01L21/66 ,  H01L21/683 ,  H01L23/66 ,  H01L25/16

Abstract: A wiring structure includes a conductive structure, a surface structure and at least one through via. The conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The surface structure is disposed adjacent to a top surface of the conductive structure. The through via extends through the surface structure and extending into at least a portion of the conductive structure.

公开(公告)号：US11328999B2

公开(公告)日：2022-05-10

申请号：US16706533

申请日：2019-12-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Fu-Chen Chu ,  Hung-Chun Kuo ,  Chen-Chao Wang

IPC: H01L23/538 ,  H01L23/552 ,  H01L23/00

Abstract: A semiconductor device package includes a lower-density substrate and a higher-density substrate. The higher-density substrate is attached to the lower-density substrate. The higher-density substrate has a first interconnection layer and a second interconnection layer disposed over the first interconnection layer. A thickness of the first interconnection layer is different from a thickness of the second interconnection layer.

公开(公告)号：US11322428B2

公开(公告)日：2022-05-03

申请号：US16700761

申请日：2019-12-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt

IPC: H01L23/48 ,  H01L23/482 ,  H01L23/31 ,  H01L21/762 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor device package includes a substrate, a first semiconductor die, a conductive via, a first contact pad and a second contact pad. The substrate includes a first surface, and a second surface opposite to the first surface, the substrate defines a cavity through the substrate. The first semiconductor die is disposed in the cavity, wherein the first semiconductor die includes an active surface adjacent to the first surface, and an inactive surface. The conductive via penetrates through the substrate. The first contact pad is exposed from the active surface of the first semiconductor die and adjacent to the first surface of the substrate. The second contact pad is disposed on the first surface of the substrate, wherein the second contact pad is connected to a first end of the conductive via.

公开(公告)号：US20220130776A1

公开(公告)日：2022-04-28

申请号：US17078070

申请日：2020-10-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01Q1/38

Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.

公开(公告)号：US20220123192A1

公开(公告)日：2022-04-21

申请号：US17564065

申请日：2021-12-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Mei-Yi Wu ,  Lu-Ming Lai ,  Yu-Ying Lee ,  Yung-Yi Chang

IPC: H01L33/62 ,  H01L33/48 ,  B81C1/00

Abstract: A semiconductor device package includes a carrier, a semiconductor device, a lid, a conductive post, a first patterned conductive layer, a conductive element disposed between the first conductive post and the first patterned conductive layer, and an adhesive layer disposed between the lid and the carrier. The conductive post is electrically connected to the first patterned conductive layer. The semiconductor device is electrically connected to the first patterned conductive layer. The lid is disposed on the carrier, and the lid includes a second patterned conductive layer electrically connected to the first conductive post.

公开(公告)号：US11309264B2

公开(公告)日：2022-04-19

申请号：US16833330

申请日：2020-03-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.

公开(公告)号：US20220115339A1

公开(公告)日：2022-04-14

申请号：US17067561

申请日：2020-10-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin SHIH ,  Chih-Cheng LEE

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/49 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/40

Abstract: An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.

公开(公告)号：US20220115288A1

公开(公告)日：2022-04-14

申请号：US17066407

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A substrate structure, a semiconductor package structure including the same and a method for manufacturing the same are provided. The substrate structure includes a first passivation layer, a first circuit layer and a first protection layer. The first passivation layer has a first surface and a second surface opposite to the first surface. The first circuit layer has an outer lateral surface. A first portion of the first circuit layer is disposed in the first passivation layer. The first protection layer is disposed on a second portion of the first circuit layer and exposed from the first surface of the first passivation layer. The outer lateral surface of the first circuit layer is covered by the first passivation layer or the first protection layer.

公开(公告)号：US11302646B2

公开(公告)日：2022-04-12

申请号：US16791946

申请日：2020-02-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih Hsieh ,  Tzu-Cheng Lin ,  Chun-Jen Chen

IPC: H01L23/552 ,  H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16 ,  H01L25/07 ,  H01L23/60

Abstract: A semiconductor device package includes a first substrate, a second substrate, a first electronic component, a second electronic component and a shielding layer. The second substrate is disposed over the first substrate. The first electronic component is disposed between the first substrate and the second substrate. The second electronic component is disposed between the first substrate and the second substrate and adjacent to the second substrate than the first electronic component. The shielding element electrically connects the second electronic component to the second substrate. The second electronic component and the shielding element define a space accommodating the first electronic component.

公开(公告)号：US11302619B2

公开(公告)日：2022-04-12

申请号：US16590173

申请日：2019-10-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung Huang

IPC: H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H01L49/02 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16 ,  H05K1/18 ,  H05K1/16

Abstract: A device structure includes a stacked structure, a dielectric material, and an electrode via. The stacked structure includes a first metal oxide layer, a second metal oxide layer and a metal layer. The second metal oxide layer is opposite to the first metal oxide layer. The metal layer is interposed between the first metal oxide layer and the second metal oxide layer. The dielectric material extends through the first metal oxide layer. The electrode via extends through the dielectric material and electrically connected to the metal layer.