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    METHOD AND SYSTEM FOR DOCUMENT PRINTING MANAGEMENT AND CONTROL, AND DOCUMENT SOURCE TRACKING
    172.
    发明申请
    METHOD AND SYSTEM FOR DOCUMENT PRINTING MANAGEMENT AND CONTROL, AND DOCUMENT SOURCE TRACKING 有权
    用于文件打印管理和控制的方法和系统以及文件源跟踪

    公开(公告)号：US20130335785A1

    公开(公告)日：2013-12-19

    申请号：US13976335

    申请日：2011-12-27

    Applicant: Wenfa Qi ,  Shuchang Han ,  Gaoyang Wang ,  Lidong Wang ,  Bin Yang

    Inventor： Wenfa Qi ,  Shuchang Han ,  Gaoyang Wang ,  Lidong Wang ,  Bin Yang

    IPC: G06F3/12 ,  G06K15/00

    CPC classification number: G06F3/1238 ,  G06F3/1222 ,  G06F3/1288 ,  G06F3/1289 ,  G06K15/4095 ,  H04L63/102 ,  H04L63/20 ,  H04L67/125 ,  H04L67/34

    Abstract: Disclosed is a method and system for document printing management and control and source tracking. A printing management service program runs at a server end. A printing monitoring service program runs at a client end. The printing management service program saves client end information, monitors and manages a client end computer, sets a printing management policy, and delivers operation instructions to the client end. The printing monitoring service program collects the client end information, sends the client end information to the server end, and executes the operation instruction.

    Abstract translation: 公开了一种用于文件打印管理和控制和源跟踪的方法和系统。 打印管理服务程序在服务器端运行。 打印监控服务程序在客户端运行。 打印管理服务程序保存客户端信息，监控和管理客户端计算机，设置打印管理策略，并向客户端传送操作指令。 打印监控服务程序收集客户端信息，将客户端信息发送到服务器端，并执行操作指令。

    Use of Band Edge Gate Metals as Source Drain Contacts
    173.
    发明申请
    Use of Band Edge Gate Metals as Source Drain Contacts 有权
    使用带边缘栅极金属作为源极漏极触点

    公开(公告)号：US20130241008A1

    公开(公告)日：2013-09-19

    申请号：US13611736

    申请日：2012-09-12

    Applicant: Kisik Choi ,  Christian Lavoie ,  Paul M. Solomon ,  Bin Yang ,  Zhen Zhang

    Inventor： Kisik Choi ,  Christian Lavoie ,  Paul M. Solomon ,  Bin Yang ,  Zhen Zhang

    IPC: H01L29/78

    CPC classification number: H01L29/7833 ,  H01L21/28512 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545

    Abstract: A device includes a gate stack formed over a channel in a semiconductor substrate. The gate stack includes a layer of gate insulator material, a layer of gate metal overlying the layer of gate insulator material, and a layer of contact metal overlying the layer band edge gate metal. The device further includes source and drain contacts adjacent to the channel. The source and drain contacts each include a layer of the gate metal that overlies and is in direct electrical contact with a doped region of the semiconductor substrate, and a layer of contact metal that overlies the layer of gate metal.

    Abstract translation: 一种器件包括形成在半导体衬底中的沟道上方的栅叠层。 栅极堆叠包括栅极绝缘体材料层，覆盖栅极绝缘体材料层的栅极金属层和覆盖层带边缘栅极金属的接触金属层。 该装置还包括邻近通道的源极和漏极接触。 源极和漏极触点各自包括覆盖并与半导体衬底的掺杂区域直接电接触的栅极金属层以及覆盖在栅极金属层上的接触金属层。

    USE OF BAND EDGE GATE METALS AS SOURCE DRAIN CONTACTS
    174.
    发明申请
    USE OF BAND EDGE GATE METALS AS SOURCE DRAIN CONTACTS 审中-公开
    使用带边缘金属作为源漏联系

    公开(公告)号：US20130241007A1

    公开(公告)日：2013-09-19

    申请号：US13421276

    申请日：2012-03-15

    Applicant: Kisik Choi ,  Christian Lavoie ,  Paul M. Solomon ,  Bin Yang ,  Zhen Zhang

    Inventor： Kisik Choi ,  Christian Lavoie ,  Paul M. Solomon ,  Bin Yang ,  Zhen Zhang

    IPC: H01L29/78 ,  H01L21/283

    CPC classification number: H01L29/7833 ,  H01L21/28512 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545

    Abstract: A method includes providing a semiconductor substrate having intentionally doped surface regions, the intentionally doped surface regions corresponding to locations of a source and a drain of a transistor; depositing a layer a band edge gate metal onto a gate insulator layer in a gate region of the transistor while simultaneously depositing the band edge gate metal onto the surface of the semiconductor substrate to be in contact with the intentionally doped surface regions; and depositing a layer of contact metal over the band edge gate metal in the gate region and in the locations of the source and the drain. The band edge gate metal in the source/drain regions reduces a Schottky barrier height of source/drain contacts of the transistor and serves to reduce contact resistance. A transistor fabricated in accordance with the method is also described.

    Abstract translation: 一种方法包括提供具有有意掺杂的表面区域的半导体衬底，有意掺杂的表面区域对应于晶体管的源极和漏极的位置; 在晶体管的栅极区域中的栅绝缘体层上沉积带边缘栅极金属层，同时将带边缘栅极金属沉积到半导体衬底的表面上以与有意掺杂的表面区域接触; 以及在所述栅极区域中以及所述源极和漏极的位置中的所述带边缘栅极金属之上沉积接触金属层。 源极/漏极区域中的带边缘栅极金属降低了晶体管的源极/漏极接触的肖特基势垒高度，并且用于降低接触电阻。 还描述了根据该方法制造的晶体管。

    Short channel semiconductor devices with reduced halo diffusion
    177.
    发明授权
    Short channel semiconductor devices with reduced halo diffusion 有权
    具有减少晕圈扩散的短沟道半导体器件

    公开(公告)号：US08445342B2

    公开(公告)日：2013-05-21

    申请号：US12821507

    申请日：2010-06-23

    Applicant: Bin Yang ,  Man Fai Ng

    Inventor： Bin Yang ,  Man Fai Ng

    IPC: H01L21/338

    CPC classification number: H01L29/7816 ,  H01L21/823807 ,  H01L21/823828 ,  H01L27/092 ,  H01L29/66492 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/7833

    Abstract: A short channel semiconductor device is formed with halo regions that are separated from the bottom of the gate electrode and from each other. Embodiments include implanting halo regions after forming source/drain regions and source/drain extension regions. An embodiment includes forming source/drain extension regions in a substrate, forming source/drain regions in the substrate, forming halo regions under the source/drain extension regions, after forming the source drain regions, and forming a gate electrode on the substrate between the source/drain regions. By forming the halo regions after the high temperature processing involved informing the source/drain and source/drain extension regions, halo diffusion is minimized, thereby maintaining sufficient distance between halo regions and reducing short channel NMOS Vt roll-off.

    Abstract translation: 短沟道半导体器件形成有与栅电极的底部彼此分离的晕圈。 实施例包括在形成源极/漏极区域和源极/漏极延伸区域之后注入晕圈。 一个实施例包括在衬底中形成源极/漏极延伸区域，在衬底中形成源极/漏极区域，在形成源极漏极区域之后在源极/漏极延伸区域下方形成卤素区域，以及在衬底上形成栅极电极 源/漏区。 通过在涉及源极/漏极和源极/漏极延伸区域的高温处理之后形成晕圈区域，使得光晕扩散最小化，从而在晕圈区域之间保持足够的距离并且减少短沟道NMOS Vt滚降。

    USE OF EPITAXIAL NI SILICIDE
    180.
    发明申请
    USE OF EPITAXIAL NI SILICIDE 有权
    外用矽硅胶的使用

    公开(公告)号：US20130012020A1

    公开(公告)日：2013-01-10

    申请号：US13612240

    申请日：2012-09-12

    Applicant: Marwan H. Khater ,  Christian Lavoie ,  Bin Yang ,  Zhen Zhang

    Inventor： Marwan H. Khater ,  Christian Lavoie ,  Bin Yang ,  Zhen Zhang

    IPC: H01L21/3205

    CPC classification number: H01L29/7839 ,  H01L21/28052 ,  H01L21/28537 ,  H01L29/47 ,  H01L29/665 ,  H01L29/66643 ,  H01L29/66772 ,  H01L29/78618

    Abstract: An epitaxial Ni silicide film that is substantially non-agglomerated at high temperatures, and a method for forming the epitaxial Ni silicide film, is provided. The Ni silicide film of the present disclosure is especially useful in the formation of ETSOI (extremely thin silicon-on-insulator) Schottky junction source/drain FETs. The resulting epitaxial Ni silicide film exhibits improved thermal stability and does not agglomerate at high temperatures.

    Abstract translation: 提供了在高温下基本上未附聚的外延Ni硅化物膜，以及形成外延Ni硅化物膜的方法。 本公开的Ni硅化物膜特别可用于形成ETSOI（极薄的绝缘体上硅）肖特基结源极/漏极FET。 得到的外延Ni硅化物膜具有改善的热稳定性，并且在高温下不聚结。

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