公开(公告)号：US20060063557A1

公开(公告)日：2006-03-23

申请号：US10519839

申请日：2003-05-14

申请人： Tetsuya Tanaka

发明人： Tetsuya Tanaka

IPC分类号： H04M1/00

CPC分类号： H01Q1/48 ,  H01Q1/243 ,  H04B1/3833

摘要： A mobile radio set includes: a first housing and a second housing including any of a transmitter circuit section, a receiver circuit section, and a radio circuit section; a flexible cable providing a connection between a circuit section of the first housing and a circuit section of the second housing; an antenna that is electrically connected to the radio circuit section, and located at the end of the second housing remote from the first housing; a bottom board cable providing a connection between bottom boards of the first housing and second housing; and a variable load that is inserted in series in the bottom board cable. This mobile radio set automatically adjusts phases of the antenna depending on service conditions of the radio set, thereby enabling to assure a stable communication.

摘要翻译： 移动无线电设备包括：包括发射机电路部分，接收机电路部分和无线电电路部分中的任何一个的第一外壳和第二外壳; 提供在第一壳体的电路部分和第二壳体的电路部分之间的连接的柔性电缆; 天线，其电连接到所述无线电电路部分，并且位于所述第二壳体的远离所述第一壳体的端部; 底板电缆，其提供第一壳体的底板和第二壳体之间的连接; 以及串联插入底板电缆的可变负载。 该移动无线电设备根据无线电设备的服务条件自动调整天线的相位，从而确保稳定的通信。

公开(公告)号：US06976250B2

公开(公告)日：2005-12-13

申请号：US10045802

申请日：2001-10-19

申请人： Shuichi Takayama ,  Hajime Ogawa ,  Kenichi Kawaguchi ,  Nobuo Higaki ,  Kensuke Odani ,  Tetsuya Tanaka ,  Shinya Miyaji ,  Taketo Heishi

发明人： Shuichi Takayama ,  Hajime Ogawa ,  Kenichi Kawaguchi ,  Nobuo Higaki ,  Kensuke Odani ,  Tetsuya Tanaka ,  Shinya Miyaji ,  Taketo Heishi

IPC分类号： G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F717/151

CPC分类号： G06F9/3802 ,  G06F9/30149 ,  G06F9/30152 ,  G06F9/30167 ,  G06F9/321 ,  G06F9/322 ,  G06F9/324 ,  G06F9/3822 ,  G06F9/3853

摘要： When a branch instruction is decoded by the instruction decoders 409a˜409c, the upper 29 bits of the PC relative value included in the branch instruction are sent to the upper PC calculator 411 and the lower 3 bits are sent to the lower PC calculator 405. The lower PC calculator 405 adds the lower 3 bits of the PC relative value and the lower 3 bits of the present lower PC 404 and sends the result to the lower PC 404 as the updated lower PC. The upper PC calculator 411 adds the upper 29 bits of the PC relative value, the upper 29 bits of the present upper PC 403, and a carry that may be received from the lower PC calculator 405, and sends the result to the upper PC 403 as the updated upper PC.

摘要翻译： 当分支指令由指令解码器409a〜409c解码时，分支指令中包含的PC相对值的高29位被发送到上PC计算器411，低3位被发送到下PC计算器 405。 下PC计算器405将PC相对值的低3位和当前下PC404的低3位相加，并将结果作为更新的下级PC发送到下PC404。 上PC计算器411将PC相对值的上29位，当前上位机403的上位29加上可从下PC计算器405接收的进位，并将结果发送到上PC403 作为更新的上位机。

公开(公告)号：US20050050241A1

公开(公告)日：2005-03-03

申请号：US10901294

申请日：2004-07-29

申请人： Akihiro Furuta ,  Nobuo Higaki ,  Tetsuya Tanaka ,  Tsuneyuki Suzuki

发明人： Akihiro Furuta ,  Nobuo Higaki ,  Tetsuya Tanaka ,  Tsuneyuki Suzuki

IPC分类号： G06F13/362 ,  G06F13/28 ,  G06F13/32

CPC分类号： G06F13/28

摘要： The present invention provides a DMA transfer controller includes: a transfer parameter storing unit for storing a bus occupation time value and transfer parameters of one set or a plurality of sets of DMA transfers for each of a plurality of logical processors; a data transfer performing unit for performing the DMA transfer on the basis of the DMA transfer parameters; a control unit for controlling the receive and transmit of the DMA transfer parameters and the start and the interruption of the DMA transfers; and a time measuring unit for starting to measure bus occupation elapse time when a first DMA transfer is started for each of the logical processors. When the bus occupation elapse time reaches the bus occupation time value, the control unit interrupts the DMA transfer that is currently performed to start the DMA transfers based on the transfer parameters related to the logical processors of a prescribed sequence.

摘要翻译： 本发明提供一种DMA传输控制器，包括：传输参数存储单元，用于存储总线占用时间值，并为多个逻辑处理器中的每一个传送一组或多组DMA传输的参数; 数据传送执行单元，用于基于DMA传输参数执行DMA传输; 控制单元，用于控制DMA传输参数的接收和发送以及DMA传输的开始和中断; 以及时间测量单元，用于当为每个逻辑处理器启动第一个DMA传输时开始测量总线占用时间。 当总线占用时间达到总线占用时间值时，控制单元基于与规定序列的逻辑处理器相关的传输参数中断当前执行的DMA传输以开始DMA传输。

公开(公告)号：US06385720B1

公开(公告)日：2002-05-07

申请号：US09114274

申请日：1998-07-13

申请人： Tetsuya Tanaka ,  Takao Yamamoto

发明人： Tetsuya Tanaka ,  Takao Yamamoto

IPC分类号： G06F1500

CPC分类号： G06F9/382 ,  G06F9/325 ,  G06F9/3844

摘要： In branch prediction in accordance with the present invention, in order to reduce the storage capacity for storing branch prediction information and simplify an information retrieval circuit while minimizing reduction in branch prediction accuracy, the position of an instruction is stored in advance and an instruction is decoded for execution, the relative position of the instruction decoded for execution is obtained on the basis of the position of the stored instruction, and when the decoded instruction is a branch instruction the result of branch by the branch instruction is recorded as history information in correspondence with the relative position of the branch instruction. After this, an instruction is pre-decoded before execution, the relative position of the pre-decoded instruction is obtained on the basis of the position of the stored instruction, when the pre-decoded instruction is a branch instruction the history information corresponding to the relative position of the pre-decoded branch instruction is referred to, and the result of the execution of the pre-decoded branch instruction is predicted by using the result of the reference to the history information.

摘要翻译： 在根据本发明的分支预测中，为了减小用于存储分支预测信息的存储容量并简化信息检索电路，同时最小化分支预测精度的降低，指令的位置被预先存储并且指令被解码 为了执行，基于存储指令的位置获得执行解码指令的相对位置，并且当解码指令是分支指令时，分支指令的分支结果被记录为对应于 分支指令的相对位置。 之后，在执行前对指令进行预解码，当预解码指令是分支指令时，基于存储指令的位置获得预解码指令的相对位置，对应于 参考预解码分支指令的相对位置，并且通过使用对历史信息的引用的结果来预测执行预解码分支指令的结果。

公开(公告)号：US06324639B1

公开(公告)日：2001-11-27

申请号：US09280777

申请日：1999-03-29

申请人： Taketo Heishi ,  Tetsuya Tanaka ,  Nobuo Higaki ,  Shuishi Takayama ,  Kensuke Odani

发明人： Taketo Heishi ,  Tetsuya Tanaka ,  Nobuo Higaki ,  Shuishi Takayama ,  Kensuke Odani

IPC分类号： G06F938

CPC分类号： G06F9/30149 ,  G06F9/30167 ,  G06F9/3802 ,  G06F9/3814 ,  G06F9/3822 ,  G06F9/3838 ,  G06F9/3853 ,  G06F9/3885

摘要： A processor can decode short instructions with a word length equal to one unit field and long instructions with a word length equal to two unit fields. An opcode of each kind of instruction is arranged into the first unit field assigned to the instruction. The number of instructions to be executed by the processor in parallel is s. When the ratio of short to long instructions is s-1:1, the s-1 short instructions are assigned to the first unit field to the s-1th unit field in the parallel execution code, and the long instruction is assigned to the sth unit field to the (s+k−1)th unit field in the same parallel execution code.

摘要翻译： 处理器可以解码具有等于一个单位字段的字长度和长度等于两个单位字段的长指令的短指令。 每种指令的操作码被布置到分配给指令的第一单位字段中。 由处理器并行执行的指令数是s。 当短指令与长指令的比率为s-1：1时，将s-1短指令分配给并行执行代码中的第s个单位字段的第一个单位字段，并将长指令分配给sth 单位字段到同一个并行执行代码中的（s + k-1）个单位字段。

公开(公告)号：US06230999B1

公开(公告)日：2001-05-15

申请号：US09332947

申请日：1999-06-15

申请人： Tetsuya Tanaka

发明人： Tetsuya Tanaka

IPC分类号： B65H7514

CPC分类号： B65H75/241 ,  B65H75/22 ,  B65H2701/5112 ,  G03B27/588

摘要： A paper magazine core for rotatably supporting a roll of photosensitive material in a paper magazine includes an inner core divided into two inner core members that can be screwed together. The surface of each inner core member is provided with rows of screw holes formed at prescribed spacing conforming with the widths of rolls of photosensitive material of various types. Flange members are screw-fastened at the screw holes whose locations are appropriate for the size of the photosensitive material to be used. Each flange member is formed with an insert portion having multiple steps insertable into paper tubes of different sizes. Non-slip portions are formed around the insert portions and surfaces of the steps. Once the flange members have been fastened on the inner core members in a light room, a roll of photosensitive material can be installed on the core in a dark room merely by joining the inner core members.

摘要翻译： 用于在纸盒中可旋转地支撑感光材料卷的纸盒芯包括分成两个可以拧在一起的内芯构件的内芯。 每个内芯构件的表面设置有与按照各种类型的感光材料的卷的宽度相符的规定间隔形成的一排螺钉孔。 法兰部件螺钉紧固在螺钉孔处，其位置适合于要使用的感光材料的尺寸。 每个凸缘构件形成有具有可插入到不同尺寸的纸管中的多个台阶的插入部分。 防滑部分形成在台阶的插入部分和表面周围。 一旦凸缘部件已被紧固在光室中的内芯部件上，则只能通过连接内芯部件，可以在暗室中将感光材料卷安装在芯部上。

公开(公告)号：US06230258B1

公开(公告)日：2001-05-08

申请号：US09144298

申请日：1998-08-31

申请人： Shuichi Takayama ,  Kensuke Odani ,  Akira Tanaka ,  Nobuo Higaki ,  Masato Suzuki ,  Tetsuya Tanaka ,  Taketo Heishi ,  Shinya Miyaji

发明人： Shuichi Takayama ,  Kensuke Odani ,  Akira Tanaka ,  Nobuo Higaki ,  Masato Suzuki ,  Tetsuya Tanaka ,  Taketo Heishi ,  Shinya Miyaji

IPC分类号： G06F930

CPC分类号： G06F9/30058 ,  G06F8/447 ,  G06F9/30021 ,  G06F9/30072 ,  G06F9/30094 ,  G06F9/30145 ,  G06F9/30167 ,  G06F9/30181 ,  G06F9/3842

摘要： An instruction conversion apparatus and method for converting instruction sequences not including conditional instructions into instruction sequences including conditional instructions wherein the conditional instructions include both a condition and an operation code for execution by the processor when the condition is satisfied. An obtaining unit receives an instruction sequence that does not include a conditional instruction whereby an instruction sequence detection unit detects a conversion target instruction sequence which transfers different transfer objects to the same storage resource when a predetermined condition is satisfied. A judging unit judges whether the instruction set of a specialized processor is assigned a conditional instruction including the same condition as the precondition whereby a conversion unit can then convert the conversion target instruction sequence into the instruction sequence including a conditional instruction with the predetermined condition. While the judgment unit decision is negative, the conversion unit converts the conversion target instruction sequence into an instruction sequence including a conditional instruction with a condition that is mutually exclusive with the predetemiined condition.

摘要翻译： 一种用于将不包括条件指令的指令序列转换成包括条件指令的指令序列的指令转换装置和方法，其中条件指令包括当条件满足时由处理器执行的条件和操作代码两者。 获取单元接收不包括条件指令的指令序列，由此当满足预定条件时，指令序列检测单元检测到将不同转移对象传送到同一存储资源的转换目标指令序列。 判断单元判断专用处理器的指令集是否被分配条件指令，该条件指令包括与前提条件相同的条件，由此转换单元然后可以将转换目标指令序列转换为包括具有预定条件的条件指令的指令序列。 当判断单元判定为否定时，转换单元将转换目标指令序列转换成具有条件的条件指令的指令序列，该条件与预先设定的条件相互排斥。

公开(公告)号：US06219779B1

公开(公告)日：2001-04-17

申请号：US09097214

申请日：1998-06-12

申请人： Shuichi Takayama ,  Nobuo Higaki ,  Tetsuya Tanaka ,  Taketo Heishi ,  Masato Suzuki

发明人： Shuichi Takayama ,  Nobuo Higaki ,  Tetsuya Tanaka ,  Taketo Heishi ,  Masato Suzuki

IPC分类号： G06F930

CPC分类号： G06F9/324 ,  G06F9/30101 ,  G06F9/30167 ,  G06F9/322 ,  G06F9/3885 ,  G06F9/461

摘要： A processor includes a constant register 36 for storing a constant, a format decoder 21 for decoding a format code located in the P0.0 field of an instruction stored in the instruction register 10, and a constant register control unit 32 which, when the format decoder 21 has decoded that the instruction includes a constant to be stored in the constant register 36, shifts the presently stored value in the constant register 36 and stores the constant into the constant register 36.

摘要翻译： 处理器包括用于存储常数的常数寄存器36，用于解码存储在指令寄存器10中的指令的P0.0字段中的格式代码的格式解码器21以及常数寄存器控制单元32，当格式 解码器21已经解码了指令包括要存储在常数寄存器36中的常数，将当前存储的值移位到常数寄存器36中，并将常数存储到常数寄存器36中。

公开(公告)号：US06119221A

公开(公告)日：2000-09-12

申请号：US959303

申请日：1997-10-28

申请人： Koji Zaiki ,  Tetsuya Tanaka

发明人： Koji Zaiki ,  Tetsuya Tanaka

IPC分类号： G06F9/32 ,  G06F9/38 ,  G06F9/44

CPC分类号： G06F9/3804 ,  G06F9/30094 ,  G06F9/3844

摘要： The present invention intends to provide an instruction prefetching apparatus capable of reducing a delay caused by branch prediction error by prefetching instruction based on a condition of a conditional branch instruction if the condition is already determined at the prefetching of the branch instruction. In the apparatus, a first decoding unit judges whether or not a processed instruction is a conditional branch instruction or not and whether or not the instruction is a condition generate instruction which determines branch condition. A condition determination signal generating means compares an address of a condition generate instruction with the content of a program counter to judge whether the condition is already determined or not, and according to the judgment, outputs a condition determination signal to a condition determination judging unit. In response to the signal input, the condition determination judging unit outputs prefetch address information for generating address to a prefetch address generating unit, using a condition code.

摘要翻译： 本发明旨在提供一种指令预取装置，如果在预取分支指令时已经确定了条件，则能够通过预取指令来减少由分支预测误差引起的延迟。 在该装置中，第一解码单元判断处理的指令是否为条件分支指令，以及该指令是否是确定分支条件的条件生成指令。 条件确定信号发生装置将条件生成指令的地址与程序计数器的内容进行比较，以判断条件是否已经被确定，并且根据该判断，向条件判定判断单元输出条件判定信号。 响应于信号输入，条件确定判断单元使用条件码将预取地址信息输出到预取地址生成单元。

公开(公告)号：US5934368A

公开(公告)日：1999-08-10

申请号：US530670

申请日：1995-09-19

申请人： Tetsuya Tanaka ,  Toshio Hatada ,  Takayuki Atarashi ,  Junichi Kobayashi ,  Akihiro Takanashi ,  Takahiro Daikoku ,  Yutaka Watanabe ,  Shizuo Zushi

发明人： Tetsuya Tanaka ,  Toshio Hatada ,  Takayuki Atarashi ,  Junichi Kobayashi ,  Akihiro Takanashi ,  Takahiro Daikoku ,  Yutaka Watanabe ,  Shizuo Zushi

IPC分类号： F24F11/00 ,  G05D22/02 ,  G05D23/19 ,  H01L23/34 ,  H01L23/427 ,  H01L23/467 ,  H05K5/02 ,  H05K7/20 ,  F25D17/06

CPC分类号： H05K7/207 ,  F24F11/0008 ,  G05D22/02 ,  G05D23/1931 ,  H01L23/34 ,  H01L23/467 ,  H05K7/20572 ,  H01L2924/0002

摘要： A highly reliable electronic apparatus free from condensation in the cabinet of the apparatus. The electronic apparatus has printed circuit boards on which heat emitting semiconductor devices are mounted and a fan. The electronic apparatus further comprises a hygrometer for measuring the relative humidity and dew-point temperature of the cooling air that is introduced into the cabinet through an opening, a surface temperature sensor for sensing the temperature of the surface of the semiconductor devices, an internal temperature sensor for sensing the internal temperature of the semiconductor device, dehumidifier and heater means made up of a heat pump and an outdoor unit, and a controller for controlling the dehumidifier means and the heater means so that the relative humidity is less than 100% and the dew-point temperature is less than the surface temperature of the semiconductor devices.

摘要翻译： 一种高度可靠的电子设备，在设备的机柜中无冷凝。 该电子设备具有安装有散热半导体器件的印刷电路板和风扇。 该电子设备还包括湿度计，用于测量通过开口引入机柜的冷却空气的相对湿度和露点温度，用于感测半导体器件表面温度的表面温度传感器，内部温度 用于感测半导体装置的内部温度的传感器，由热泵和室外机组成的除湿器和加热器装置，以及用于控制除湿装置和加热装置的控制器，使得相对湿度小于100％ 露点温度小于半导体器件的表面温度。