-
公开(公告)号：US08258827B2
公开(公告)日：2012-09-04
申请号：US12789424
申请日：2010-05-27
申请人： Chih-Hsiang Chang , Jung-Mao Lin , Ching-Yuan Yang
发明人： Chih-Hsiang Chang , Jung-Mao Lin , Ching-Yuan Yang
IPC分类号： H03B19/00
CPC分类号： H03B19/14
摘要： A frequency doubler receiving an in-phase oscillating signal and an inverse oscillating signal and generating an output signal oscillating at a multiplied frequency, accordingly. The frequency doubler has a first transistor, a second transistor, a first inductor and a second inductor. A first terminal of the first transistor and a first terminal of the second transistor are at a common voltage. The frequency doubler receives the in-phase oscillating signal and the inverse oscillating signal via control terminals of the first and second transistors. The first and second inductors couple a second terminal of the first transistor and a second terminal of the second transistor to an output terminal of the frequency doubler, respectively. The first and second inductors may be separate inductance devices or, in another case, be implemented by a symmetric inductor.
摘要翻译： 接收同相振荡信号的倍频器和反相振荡信号，并相应地产生以倍频振荡的输出信号。 倍频器具有第一晶体管，第二晶体管，第一电感器和第二电感器。 第一晶体管的第一端子和第二晶体管的第一端子处于公共电压。 倍频器通过第一和第二晶体管的控制端接收同相振荡信号和反相振荡信号。 第一和第二电感分别将第一晶体管的第二端子和第二晶体管的第二端子耦合到倍频器的输出端子。 第一和第二电感器可以是分离的电感器件，或者在另一种情况下可由对称电感器来实现。
-
公开(公告)号：US08035457B2
公开(公告)日：2011-10-11
申请号：US12687891
申请日：2010-01-15
申请人： Chih-Hsiang Chang , Jung-Mao Lin , Ching-Yuan Yang
发明人： Chih-Hsiang Chang , Jung-Mao Lin , Ching-Yuan Yang
IPC分类号： H03B5/08
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1221 , H03B5/1225 , H03B5/1253 , H03B5/1271 , H03B5/1296
摘要： A voltage controlled oscillator (VCO) includes a voltage controlled current source (VCCS), a negative resistance circuit (NRC), a first transformer, a second transformer, a first transistor and a second transistor. A current terminal of the VCCS receives a control voltage. First terminals of first and second current paths in the NRC are coupled to a current terminal of the VCCS. Primary sides of the first and the second transformers are respectively coupled to second terminals of the first and the second current paths. Secondary sides of the first and the second transformers are first and second output terminals of the VCO, respectively. First terminals of the first and the second transistor are respectively coupled to the secondary sides of the first and the second transformers. Control terminals of the first and the second transformers are respectively coupled to the primary sides of the first and the second transformers.
摘要翻译： 压控振荡器（VCO）包括压控电流源（VCCS），负电阻电路（NRC），第一变压器，第二变压器，第一晶体管和第二晶体管。 VCCS的电流端子接收控制电压。 NRC中的第一和第二电流路径的第一端子耦合到VCCS的电流端子。 第一和第二变压器的主侧分别耦合到第一和第二电流路径的第二端。 第一和第二变压器的次级侧分别是VCO的第一和第二输出端。 第一和第二晶体管的第一端分别耦合到第一和第二变压器的次级侧。 第一变压器和第二变压器的控制端子分别与第一变压器和第二变压器的一次侧接合。
-
公开(公告)号：US20110193178A1
公开(公告)日：2011-08-11
申请号：US12702862
申请日：2010-02-09
CPC分类号： H01L29/66795 , H01L29/7853
摘要： An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.
摘要翻译： 集成电路结构包括在衬底上的衬底和含锗半导体鳍。 含锗半导体翅片具有第一宽度的上部和在上部下方的颈部区域，并且具有小于第一宽度的第二宽度。
-
公开(公告)号：US20110024804A1
公开(公告)日：2011-02-03
申请号：US12831842
申请日：2010-07-07
CPC分类号： H01L29/785 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02532 , H01L21/18 , H01L29/1054 , H01L29/161 , H01L29/165 , H01L29/66575 , H01L29/66628 , H01L29/66636 , H01L29/66772 , H01L29/66795 , H01L29/7848
摘要： A method for producing a SiGe stressor with high Ge concentration is provided. The method includes providing a semiconductor substrate with a source area, a drain area, and a channel in between; depositing the first SiGe film layer on the source area and/or the drain area; performing a low temperature thermal oxidation, e.g., a high water vapor pressure wet oxidation, to form an oxide layer at the top of the first SiGe layer and to form the second SiGe film layer with high Ge percentage at the bottom of the first SiGe film layer without Ge diffusion into the semiconductor substrate; performing a thermal diffusion to form the SiGe stressor from the second SiGe film layer, wherein the SiGe stressor provides uniaxial compressive strain on the channel; and removing the oxide layer. A Si cap layer can be deposited on the first SiGe film layer prior to performing oxidation.
摘要翻译： 提供了具有高Ge浓度的SiGe应激源的制造方法。 该方法包括：提供具有源极区域，漏极区域和沟道之间的半导体衬底; 在源极区域和/或漏极区域上沉积第一SiGe膜层; 进行低温热氧化，例如高水蒸气压湿氧化，以在第一SiGe层的顶部形成氧化物层，并在第一SiGe膜的底部形成具有高Ge百分比的第二SiGe膜层 Ge层扩散到半导体衬底中; 执行热扩散以从第二SiGe膜层形成SiGe应力源，其中SiGe应力源在通道上提供单轴压缩应变; 并除去氧化物层。 在进行氧化之前，可以在第一SiGe膜层上沉积Si覆盖层。
-
15.发明授权Voltage-controlled oscillator module and method for generating oscillator signals 有权压控振荡器模块及其产生振荡信号的方法公开(公告)号：US08723609B2
公开(公告)日：2014-05-13
申请号：US13558360
申请日：2012-07-26
申请人： Chih-Hsiang Chang , Nai-Chen Cheng , Yu Lee , Ching-Yuan Yang
发明人： Chih-Hsiang Chang , Nai-Chen Cheng , Yu Lee , Ching-Yuan Yang
CPC分类号： H03B5/1212 , H03B5/1228 , H03B5/124 , H03B5/1243 , H03B5/1296 , H03B19/14 , H03B27/00 , H03B2200/004 , H03B2200/0078 , H03B2201/0208 , H03L7/24
摘要： A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.
摘要翻译： 提供了包括第一VCO单元，第二VCO单元和匹配电路的压控振荡器（VCO）模块。 第一VCO单元包括第一端子和第二端子，并产生第一振荡器信号。 第二VCO单元耦合到第一VCO单元并产生第二振荡器信号。 匹配电路耦合在第一VCO单元和第二VCO单元之间。 匹配电路包括分别耦合在第一VCO单元的第一端和第二VCO单元之间的多个电感器模块，位于第一VCO单元的第一端子和第二端子之间，并且在第一VCO单元的第二端子之间 和第二个VCO单元。 此外，还提供了一种用于产生振荡器信号的方法。
-
公开(公告)号：US08187948B2
公开(公告)日：2012-05-29
申请号：US12032962
申请日：2008-02-18
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.
摘要翻译： 提供了形成浅沟槽隔离区域的方法。 该方法包括提供包括顶表面的半导体衬底; 形成从所述顶表面延伸到所述半导体衬底中的开口; 执行保形沉积方法以将电介质材料填充到开口中; 对所述电介质材料进行第一处理，其中所述第一处理提供足够高的能量以破坏所述电介质材料中的键; 并对介电材料进行蒸汽退火。
-
公开(公告)号：US20100178140A1
公开(公告)日：2010-07-15
申请号：US12534230
申请日：2009-08-03
申请人： Chih-Hsiang Chang
发明人： Chih-Hsiang Chang
IPC分类号： E04H6/02
摘要： A parking device for a bicycle includes a main control unit (11), a parking unit (12) mounted on the main control unit, and a locking member (13) movably mounted in the main control unit and extending into the parking unit. Thus, the parking device can lock the bicycle (20) so as to provide a burglarproof effect. In addition, the bicycle is locked by the parking device so that the user needs not to carry a lock to prevent from causing a burden to the user. Further, the parking device locks the bicycle easily and quickly to facilitate the user locking and unlocking the bicycle.
摘要翻译： 一种用于自行车的停车装置包括主控制单元（11），安装在主控制单元上的停放单元（12）和可移动地安装在主控制单元中并延伸到停车单元中的锁定构件（13）。 因此，停车装置可以锁定自行车（20），以提供防盗效果。 此外，自行车被停车装置锁定，使得用户不需要携带锁来防止对用户造成负担。 此外，停车装置容易且快速地锁定自行车，以便于使用者锁定和解锁自行车。
-
公开(公告)号：US20090209083A1
公开(公告)日：2009-08-20
申请号：US12032962
申请日：2008-02-18
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.
摘要翻译： 提供了形成浅沟槽隔离区域的方法。 该方法包括提供包括顶表面的半导体衬底; 形成从所述顶表面延伸到所述半导体衬底中的开口; 执行保形沉积方法以将电介质材料填充到开口中; 对所述电介质材料进行第一处理，其中所述第一处理提供足够高的能量以破坏所述电介质材料中的键; 并对介电材料进行蒸汽退火。
-
公开(公告)号：US08546242B2
公开(公告)日：2013-10-01
申请号：US13481526
申请日：2012-05-25
IPC分类号： H01L21/8238
CPC分类号： H01L21/76224
摘要： A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.
摘要翻译： 提供了形成浅沟槽隔离区域的方法。 该方法包括提供包括顶表面的半导体衬底; 形成从所述顶表面延伸到所述半导体衬底中的开口; 执行保形沉积方法以将电介质材料填充到开口中; 对所述电介质材料进行第一处理，其中所述第一处理提供足够高的能量以破坏所述电介质材料中的键; 并对介电材料进行蒸汽退火。
-
公开(公告)号：US20120235273A1
公开(公告)日：2012-09-20
申请号：US13481526
申请日：2012-05-25
IPC分类号： H01L29/06
CPC分类号： H01L21/76224
摘要： A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.
摘要翻译： 提供了形成浅沟槽隔离区域的方法。 该方法包括提供包括顶表面的半导体衬底; 形成从所述顶表面延伸到所述半导体衬底中的开口; 执行保形沉积方法以将电介质材料填充到开口中; 对所述电介质材料进行第一处理，其中所述第一处理提供足够高的能量以破坏所述电介质材料中的键; 并对介电材料进行蒸汽退火。
-
-
-
-
-
-
-
-
-
搜索结果
21 条记录 (耗时 0.017 秒)
