Abstract:
The present disclosure relates to methods and apparatuses for generating a through-silicon via (TSV) model for RC extraction that accurately models an interposer substrate comprising one or more TSVs. In some embodiments, a method is performed by generating an interposer wafer model having a sub-circuit that models a TSV. The sub-circuit can compensate for limitations in resistive and capacitive extraction of traditional TSV models performed by EDA tools. In some embodiments, the sub-circuit is coupled to a floating common node of the model. The floating common node enables the interposer wafer model to take into consideration capacitive coupling within the interposer. The improved interposer wafer model enables accurate RC extraction of an interposer with one or more TSVs, thereby providing for an interposer wafer model that is consistent between GDS and APR flows.
Abstract:
A method includes extracting a first netlist from a first layout of a semiconductor circuit and estimating layout-dependent effect data based on the first netlist. A first simulation of the semiconductor circuit is performed based on the first netlist using an electronic design automation tool, and a second simulation of the semiconductor circuit is performed based on a circuit schematic using the electronic design automation tool. A weight and a sensitivity of the at least one layout-dependent effect are calculated, and the first layout of the semiconductor circuit is adjusted based on the weight and the sensitivity to provide a second layout of the semiconductor circuit. The second layout is stored in a non-transient storage medium.
Abstract:
In a semiconductor device design method performed by at least one processor, first and second electrical components are extracted from a layout of a semiconductor device. The semiconductor device has a semiconductor substrate and the first and second electrical components in the semiconductor substrate. Parasitic parameters of a coupling in the semiconductor substrate between the first and second electrical components are extracted using a first tool. Intrinsic parameters of the first and second electrical components are extracted using a second tool different from the first tool. The extracted parasitic parameters and intrinsic parameters are combined into a model of the semiconductor device. The parasitic parameters of the coupling are extracted based on a model of the coupling included in the second tool.
Abstract:
The invention relates in part to a folded dipole having a dipole axis and a pair of arms which together have a profile which is concave on one side and convex on the other when viewed along the dipole axis. The dipoles may be arranged as a dipole box around a central region, typically in a generally circular or square configuration. Further elements may be placed in the dipole box or in the gaps between dipole boxes. The antenna may be a single-band antenna, or a multi-band antenna with the further elements operating in a different frequency band to the dipole boxes. The further elements may be concentric dipole boxes. The invention is particularly suited for use in a cellular base station panel antenna. A novel coaxial to microstrip transition is also described.
Abstract:
An antenna array employing a combined azimuth and elevation beam angle adjustment electromechanical system is disclosed. The system employs a dual purpose remotely controllable actuator. The actuator is used to adjust azimuth angle of the antenna array and radiation beam tilt of the same. An antenna array employing a combined azimuth, beamwidth and elevation beam angle adjustment electromechanical system is also disclosed.
Abstract:
A method and apparatus are provided for constructing a multi-band antenna (10). The method includes the steps of providing a plurality of combination-type dipole assemblies (114, 116, 118, 120, 122, FIG. 7) each defined by a box-type dipole array (36) disposed coaxially within a circular-type dipole array (134), disposing the plurality of combination-type dipole assemblies along a substantially straight line (34) over a ground plane (140) and disposing a plurality of crossed-type dipole antenna arrays along the substantially straight line in alternating order with the plurality of combination-type dipole assemblies.
Abstract:
A base station antenna system producing a beam, includes an array antenna rotatably mounted with respect to an antenna support so as to permit azimuth steering of the antenna beam and an azimuth position rotation arrangement configured to rotate the array antenna with respect to the antenna support about an antenna axis. The rotation arrangement further includes an actuator mounted on the antenna support having an operator adapted to move linearly along an operator motion axis parallel to the antenna axis when the actuator is energized. A motion converter is coupled between the actuator and the array antenna, wherein linear movement of the operator along said operator motion axis produces rotary movement of the antenna about the parallel antenna axis.
Abstract:
In a semiconductor device design method performed by at least one processor, first and second electrical components are extracted from a layout of a semiconductor device. The semiconductor device has a semiconductor substrate and the first and second electrical components in the semiconductor substrate. Parasitic parameters of a coupling in the semiconductor substrate between the first and second electrical components are extracted using a first tool. Intrinsic parameters of the first and second electrical components are extracted using a second tool different from the first tool. The extracted parasitic parameters and intrinsic parameters are combined into a model of the semiconductor device. The parasitic parameters of the coupling are extracted based on a model of the coupling included in the second tool.
Abstract:
A method includes creating a technology file including data for an integrated circuit including at least one die coupled to an interposer and a routing between the at least one die and the interposer, b) creating a netlist including data approximating at least one of capacitive or inductive couplings between conductors in the at least one die and in the interposer based on the technology file, c) simulating a performance of the integrated circuit based on the netlist, d) adjusting the routing between the at least one die and the interposer based on the simulation to reduce the at least one of the capacitive or the inductive couplings, and e) repeating steps c) and d) to optimize the at least one of the capacitive or inductive couplings.
Abstract:
A multiband base station antenna for communicating with a plurality of terrestrial mobile devices is described. The antenna including one or modules, each module including a low frequency ring element; and a high frequency dipole element superposed with the low frequency ring element. The element includes a ground plane; and a feed probe directed away from the ground plane and having a coupling part positioned proximate to the ring to enable the feed probe to electromagnetically couple with the ring. A dielectric clip provides a spacer between the feed probe and the ring, and also connects the ring to the ground plane. An antenna element is also described including a ring, and one or more feed probes extending from the ring, wherein the ring and feed probe(s) are formed from a unitary piece.