Abstract:
A graphics processor capable of efficiently performing arithmetic operations and computing elementary functions is described. The graphics processor has at least one arithmetic logic unit (ALU) that can perform arithmetic operations and at least one elementary function unit that can compute elementary functions. The ALU(s) and elementary function unit(s) may be arranged such that they can operate in parallel to improve throughput. The graphics processor may also include fewer elementary function units than ALUs, e.g., four ALUs and a single elementary function unit. The four ALUs may perform an arithmetic operation on (1) four components of an attribute for one pixel or (2) one component of an attribute for four pixels. The single elementary function unit may operate on one component of one pixel at a time. The use of a single elementary function unit may reduce cost while still providing good performance.
Abstract:
An electrostatic discharge protection circuit includes an input node coupled to receive an input signal and an output node coupled to output the input signal to an internal circuit. A first inductor is coupled to the input node and to the output node, and a second inductor is coupled to the output node and to a first power supply node through a resistance. A plurality of protection devices are coupled to the first and second inductors and are disposed in parallel with each other.
Abstract:
An air conditioning system for a vehicle includes a cabin air conditioning unit, a heat management unit, a temperature detecting unit, a switching unit, and a control unit. The control unit is operable to control operations of the cabin air conditioning unit, the switching unit, and the heat management unit according to temperature detection results from the temperature detecting unit, thereby regulating temperature of at least one of a passenger cabin and a heat generating component, which generates waste heat during operation thereof, of the vehicle.
Abstract:
Connection establishing management methods for traversing network address translation (NAT) routers and firewalls between network terminal devices to establish a connection channel therebetween for use in a network system including at least first, second and third network terminal devices and a traversal server are disclosed. First, when traversal server receives a call request of first and second network terminal devices, network topology levels of first and second network terminal devices are detected to detect whether first and second network terminal devices are located behind NAT router and/or firewall. Then, one of first and second network terminal devices or third network terminal device is selected according to the detection result such that selected network terminal device acted as proxy server for the traversal server to establish a connection channel corresponding to call request between first and second network terminal devices.
Abstract:
A wireless network interface device with concealable electrical interface includes a casing unit, a wireless receiver unit, an elastic assembly and an actuator. The casing unit has an outer body, an interface opening, and an actuator opening. The wireless receiver unit has a receiving module and an I-shaped groove. The I-shaped groove has a first recess and a second recess bridged by a connecting recess. The elastic assembly has at least one first elastic member. The actuator has a second elastic member, a releaser member, and a locking member. When the locking member is engaged to the first recess, at least one first elastic member is compressed with the electrical interface being concealed inside the casing unit. When the releaser member is pressed, the locking member disengages from the first recess, and at least one first elastic member pushes the receiving module to expose the electrically connected electrical interface.
Abstract:
A light-emitting device comprising: a substrate having a first surface and a second surface, wherein the second surface is opposite to the first surface; a semiconductor structure formed on the first surface of the substrate, comprising a first type semiconductor layer, an active layer and a second type semiconductor layer; and an isolation region separating at least the active layer into a first part and a second part, wherein the first part is capable of generating the electromagnetic radiation, and the second part comprises a breakdown diode.
Abstract:
A sensing method and circuit for a capacitive touch panel sense the capacitance variation of a lateral capacitor formed at the intersection of two traces of the capacitive touch panel, to distinguish a real point from a ghost point. A sensing cycle includes two non-overlapping clock phases. In the first clock phase, the voltages across the lateral capacitor and across a sensing capacitor are set. In the second clock phase, the voltage at a first terminal of the lateral capacitor is changed, and a second terminal of the lateral capacitor is connected to a first terminal of the sensing capacitor, causing a voltage variation at a second terminal of the sensing capacitor. This voltage variation is used to determine whether the intersection is touched. The sensing method and circuit reflect the status of the lateral capacitor in real-time and prevent the location of the touch point from being misjudged.
Abstract:
An electrostatic discharge (ESD) protection circuit, suitable for an input stage circuit including a first N channel metal oxide semiconductor (NMOS) transistor, is provided. The ESD protection circuit includes an P channel metal oxide semiconductor (PMOS) transistor and an impedance device, in which the PMOS transistor has a source coupled to a gate of the first NMOS transistor, and a drain coupled to a source of the first NMOS transistor, and the impedance device is coupled between a gate of the PMOS transistor and a first power rail to perform a initial-on ESD protection circuit. The ESD protection circuit formed by the PMOS transistor and the resistor is capable of increasing the turn-on speed of the ESD protection circuit and preventing the input stage circuit from a CDM ESD event.
Abstract:
A vertical stacked light emitting structure includes a substrate unit, a stacked type light emitting module, and a flip-chip type light emitting module. The substrate unit includes a substrate body. The stacked type light emitting module includes a first light emitting unit and a light guiding unit. The first light emitting unit includes at least one first LED bare chip disposed on and electrically connected to the substrate body, and the light guiding unit includes at least one light guiding body disposed on the first LED bare chip. The flip-chip type light emitting module includes a second light emitting unit. The second light emitting unit includes at least one second LED bare chip disposed on the light guiding body and electrically connected to the substrate body. Hence, the first LED bare chip, the light guiding body, and the second LED bare chip are stacked on top of one another sequentially.
Abstract:
A vertical stacked light emitting structure includes a substrate unit, a first light emitting unit, a light guiding unit, and a second light emitting unit. The substrate unit includes at least one substrate body. The first light emitting unit includes at least one first LED bare chip disposed on the substrate body and electrically connected to the substrate body. The light guiding unit includes at least one light guiding body disposed on the first LED bare chip. The second light emitting unit includes at least one second LED bare chip disposed on the light guiding body and electrically connected to the substrate body. Therefore, the first LED bare chip, the light guiding body, and the second LED bare chip are stacked on top of one another sequentially.