公开(公告)号：US07825712B2

公开(公告)日：2010-11-02

申请号：US12407508

申请日：2009-03-19

申请人： Dae Kun Yoon

发明人： Dae Kun Yoon

IPC分类号： H03H11/16

CPC分类号： H03K5/1506 ,  G11C7/22 ,  G11C7/222 ,  H03K5/13 ,  H03K2005/00052

摘要： A multi-phase clock signal generating circuit includes a phase correction block configured to receive multi-phase clock signals and produce a plurality of interpolated phase clock signal groups in which the phases of the multi-phase clock signals are differently controlled. The multi-phase clock signals are out of phase with each other. A clock control block is configured to produce output multi-clock signals by selectively outputting one among the interpolated phase clock signal groups using a digital control signal having a plurality of bits which are produced based on phase differences of the multi-phase clock signals.

摘要翻译： 多相时钟信号发生电路包括相位校正块，其被配置为接收多相时钟信号并产生多个内插相位时钟信号组，其中多相时钟信号的相位被不同地控制。 多相时钟信号彼此不同相。 时钟控制块被配置为通过使用具有基于多相时钟信号的相位差产生的多个位的数字控制信号来选择性地输出内插相位时钟信号组之一来产生输出多时钟信号。

公开(公告)号：US07738621B2

公开(公告)日：2010-06-15

申请号：US12005933

申请日：2007-12-28

申请人： Dae-Kun Yoon ,  Kyung-Hoon Kim ,  Dae-Han Kwon ,  Taek-Sang Song

发明人： Dae-Kun Yoon ,  Kyung-Hoon Kim ,  Dae-Han Kwon ,  Taek-Sang Song

IPC分类号： G06M3/00 ,  H03K21/40

CPC分类号： G06M3/12

摘要： A counter with overflow prevention capability includes a counting unit configured to count an output code in response to an input signal and an overflow preventing unit configured to control the counting unit to stop counting the output code when a current value of the output code is a maximum value but a previous value thereof is not the maximum value.

摘要翻译： 具有防溢能力的计数器包括：计数单元，被配置为响应于输入信号对输出代码进行计数;以及溢出防止单元，被配置为当输出代码的当前值为最大值时，控制计数单元停止计数输出代码 值，但其前一值不是最大值。

公开(公告)号：US20090278577A1

公开(公告)日：2009-11-12

申请号：US12164758

申请日：2008-06-30

申请人： Dae-Kun Yoon ,  Dae-Han Kwon ,  Chang-Kyu Choi ,  Jun-Woo Lee

发明人： Dae-Kun Yoon ,  Dae-Han Kwon ,  Chang-Kyu Choi ,  Jun-Woo Lee

IPC分类号： H03L7/06

CPC分类号： H03L7/0814 ,  H03K3/356121 ,  H03K3/356182

摘要： A semiconductor device including an edge synchronizer which outputs a synchronized strobe signal generated by synchronizing a transition time point of a strobe signal with clock edges of a main clock or a sub clock, a detector which outputs a phase determination signal indicating a phase difference between the main clock and the sub clock in response to the synchronized strobe signal, and a duty ratio corrector which adjusts a duty ratio of the main clock and the sub clock in response to the phase determination signal.

摘要翻译： 一种半导体器件，包括边沿同步器，其输出通过使选通信号的转变时间点与主时钟或子时钟的时钟沿同步而产生的同步选通信号;输出相位确定信号的检测器， 主时钟和子时钟响应于同步选通信号;以及占空比校正器，其响应于相位确定信号调整主时钟和子时钟的占空比。

公开(公告)号：US08836397B2

公开(公告)日：2014-09-16

申请号：US12240166

申请日：2008-09-29

申请人： Dae-Kun Yoon ,  Taek-Sang Song

发明人： Dae-Kun Yoon ,  Taek-Sang Song

IPC分类号： H03K3/00 ,  H03K3/017 ,  H03K3/356

CPC分类号： H03K3/017 ,  H03K3/356104

摘要： A duty ratio correction circuit includes a duty cycle ratio controlling unit configured to generate an internal clock signal having a duty cycle ratio defined according to a first reference clock signal and a reset signal and a reset signal generating unit configured to generate the reset signal in response to a second reference clock signal and the internal clock signal fed back thereto.

摘要翻译： 占空比校正电路包括占空比比率控制单元，其被配置为产生具有根据第一参考时钟信号和复位信号定义的占空比的内部时钟信号，以及复位信号生成单元，被配置为响应于产生复位信号 到第二参考时钟信号和反馈到其的内部时钟信号。

公开(公告)号：US20110273937A1

公开(公告)日：2011-11-10

申请号：US13186366

申请日：2011-07-19

申请人： Dae-Kun YOON ,  Dae-Han KWON ,  Taek-Sang SONG

发明人： Dae-Kun YOON ,  Dae-Han KWON ,  Taek-Sang SONG

IPC分类号： G11C8/18

CPC分类号： G11C7/22 ,  G11C7/1066 ,  G11C7/1072 ,  G11C7/222 ,  H03L7/0814

摘要： A semiconductor memory device includes an edge detector configured to receive two pairs of complementary clocks to detect edges of the clocks, a comparator configured to compare output signals of the edge detector to detect whether clocks of the same pair have a phase difference of 180 degrees and detect whether clocks of different pairs have a phase difference of 90 degrees, a control signal generator configured to generate a control signal for controlling phases of the clocks according to an output signal of the comparator, and a phase corrector configured to correct phases of the clocks in response to the control signal.

摘要翻译： 半导体存储器件包括边缘检测器，被配置为接收两对互补时钟以检测时钟的边沿;比较器，被配置为比较边缘检测器的输出信号，以检测同一对的时钟是否具有180度的相位差;以及 检测不同对的时钟是否具有90度的相位差，控制信号发生器被配置为根据比较器的输出信号产生用于控制时钟相位的控制信号;以及相位校正器，被配置为校正时钟的相位 响应于控制信号。

公开(公告)号：US08004336B2

公开(公告)日：2011-08-23

申请号：US12150912

申请日：2008-05-01

申请人： Dae-Kun Yoon ,  Dae-Han Kwon ,  Taek-Sang Song

发明人： Dae-Kun Yoon ,  Dae-Han Kwon ,  Taek-Sang Song

IPC分类号： H03H11/16 ,  H03K5/13

CPC分类号： G11C7/22 ,  G11C7/1066 ,  G11C7/1072 ,  G11C7/222 ,  H03L7/0814

摘要： A semiconductor memory device includes an edge detector configured to receive two pairs of complementary clocks to detect edges of the clocks, a comparator configured to compare output signals of the edge detector to detect whether clocks of the same pair have a phase difference of 180 degrees and detect whether clocks of different pairs have a phase difference of 90 degrees, a control signal generator configured to generate a control signal for controlling phases of the clocks according to an output signal of the comparator, and a phase corrector configured to correct phases of the clocks in response to the control signal.

摘要翻译： 半导体存储器件包括边缘检测器，被配置为接收两对互补时钟以检测时钟的边沿;比较器，被配置为比较边缘检测器的输出信号，以检测同一对的时钟是否具有180度的相位差;以及 检测不同对的时钟是否具有90度的相位差，控制信号发生器被配置为根据比较器的输出信号产生用于控制时钟相位的控制信号;以及相位校正器，被配置为校正时钟的相位 响应于控制信号。

公开(公告)号：US07701267B2

公开(公告)日：2010-04-20

申请号：US12164758

申请日：2008-06-30

申请人： Dae-Kun Yoon ,  Dae-Han Kwon ,  Chang-Kyu Choi ,  Jun-Woo Lee

发明人： Dae-Kun Yoon ,  Dae-Han Kwon ,  Chang-Kyu Choi ,  Jun-Woo Lee

IPC分类号： H03L7/06

CPC分类号： H03L7/0814 ,  H03K3/356121 ,  H03K3/356182

摘要： A semiconductor device including an edge synchronizer which outputs a synchronized strobe signal generated by synchronizing a transition time point of a strobe signal with clock edges of a main clock or a sub clock, a detector which outputs a phase determination signal indicating a phase difference between the main clock and the sub clock in response to the synchronized strobe signal, and a duty ratio corrector which adjusts a duty ratio of the main clock and the sub clock in response to the phase determination signal.

摘要翻译： 一种半导体器件，包括边沿同步器，其输出通过使选通信号的转变时间点与主时钟或子时钟的时钟沿同步而产生的同步选通信号;输出相位确定信号的检测器， 主时钟和子时钟响应于同步选通信号;以及占空比校正器，其响应于相位确定信号调整主时钟和子时钟的占空比。

公开(公告)号：US20090322394A1

公开(公告)日：2009-12-31

申请号：US12266608

申请日：2008-11-07

申请人： Taek-Sang SONG ,  Dae-Han Kwon ,  Dae-Kun Yoon

发明人： Taek-Sang SONG ,  Dae-Han Kwon ,  Dae-Kun Yoon

IPC分类号： H03K5/12 ,  H03K3/03

CPC分类号： H03K3/0322 ,  H03K23/542

摘要： A ring oscillator including a plurality of buffer units, each of which has a cross-coupled structure, for generating clock signals using a bias voltage having a predetermined voltage level applied thereto, wherein the clock signals have a swing width corresponding to the bias voltage.

摘要翻译： 一种环形振荡器，包括多个缓冲单元，每个缓冲单元具有交叉耦合结构，用于使用施加有预定电压电平的偏置电压来产生时钟信号，其中时钟信号具有对应于偏置电压的摆幅宽度。

公开(公告)号：US20090168944A1

公开(公告)日：2009-07-02

申请号：US12344552

申请日：2008-12-28

申请人： Taek-Sang Song ,  Kyung-Hoon Kim ,  Dae-Han Kwon ,  Dae-Kun Yoon

发明人： Taek-Sang Song ,  Kyung-Hoon Kim ,  Dae-Han Kwon ,  Dae-Kun Yoon

IPC分类号： H03D3/24

CPC分类号： H03L7/095 ,  G01R29/0273 ,  H03K5/153 ,  H03K2005/00065 ,  H03K2005/00071 ,  Y10S331/02

摘要： A low pass filter includes a driver unit configured to output a voltage proportional to an input pulse width, a charge/discharge unit configured to charge the output voltage of the driver unit, a comparator unit configured to compare an output voltage of the charge/discharge unit with a reference value to output a square wave signal, and a switching unit configured to switch the charge/discharge unit to an operation state, based on a bandwidth expansion signal.

摘要翻译： 低通滤波器包括被配置为输出与输入脉冲宽度成比例的电压的驱动器单元，被配置为对驱动器单元的输出电压进行充电的充电/放电单元，被配置为比较充电/放电的输出电压 具有参考值的单元以输出方波信号;以及切换单元，被配置为基于带宽扩展信号将充电/放电单元切换到操作状态。

公开(公告)号：US20090128208A1

公开(公告)日：2009-05-21

申请号：US12263690

申请日：2008-11-03

申请人： Taek-Sang Song ,  Kyung-Hoon Kim ,  Dae-Han Kwon ,  Dae-Kun Yoon

发明人： Taek-Sang Song ,  Kyung-Hoon Kim ,  Dae-Han Kwon ,  Dae-Kun Yoon

IPC分类号： H03K3/017

CPC分类号： H03K3/017

摘要： Apparatus for detecting duty ratio of signals in semiconductor device circuit includes a circuit for detecting a duty ratio of signals in a semiconductor device includes a comparing unit which compares a duty cycle of first and second input clock signals input differentially and generates a first output signal and a second output signal, a latching unit which stores the first and second output signals and generates a detected signal corresponding to the first and second output signals, and an adjusting unit which receives the first and the second output signals, and transmits the first and the second output signals to the latching unit based on a voltage level difference of the first and second output signals.

摘要翻译： 用于检测半导体器件电路中的信号占空比的装置包括用于检测半导体器件中的信号的占空比的电路，包括比较单元，其比较差分输入的第一和第二输入时钟信号的占空比并产生第一输出信号， 第二输出信号，存储第一和第二输出信号并产生对应于第一和第二输出信号的检测信号的锁存单元，以及接收第一和第二输出信号的调整单元，并且发送第一和第二输出信号 基于第一和第二输出信号的电压电平差，向锁存单元输出第二输出信号。