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公开(公告)号：US20130285766A1
公开(公告)日：2013-10-31
申请号：US13848216
申请日：2013-03-21
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
IPC: H03H7/01
CPC classification number: H03H7/0138 , H03H15/00
Abstract: A circuit that provides a rotating coefficient FIR filter with all necessary coefficient sets present at the same time, without the need for delay elements or devices providing for adjustable impedances is described. An input signal is sampled in round robin fashion by a plurality of sample and hold devices. The outputs of the sample and hold devices are connected to sets of impedance devices. Each set of impedance devices implements the coefficients of the desired frequency response of the filter. The impedance devices in each set are connected to the sample and hold devices in a different order from each other set, so that each set of impedance devices will produce the desired frequency response when a different one of the sampling circuits contains a new sample of the input signal. Switches connect the sets of impedance devices to an output, only one switch being closed at a time to provide the output signal.
Abstract translation: 描述了提供具有同时存在的所有必要系数组的旋转系数FIR滤波器的电路，而不需要提供可调阻抗的延迟元件或器件。 通过多个采样和保持装置以循环方式对输入信号进行采样。 采样和保持设备的输出连接到一组阻抗设备。 每组阻抗器件实现滤波器所需频率响应的系数。 每组中的阻抗装置以彼此不同的顺序连接到采样和保持装置，使得当不同的采样电路包含新的采样电路时，每组阻抗装置将产生期望的频率响应 输入信号。 开关将阻抗器件组连接到输出端，一次只有一个开关闭合以提供输出信号。
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公开(公告)号：US20130241647A1
公开(公告)日：2013-09-19
申请号：US13683637
申请日：2012-11-21
Applicant: ESS TECHNOLOGY, INC.
Inventor： Dustin Dale Forman , Trevor Blake Lynch-Staunton , Montana T.C. Reid
IPC: H03F3/217
CPC classification number: H03F3/217 , H03F1/3205 , H03F3/2171 , H03F3/2175
Abstract: The present application describes an apparatus and method for reducing distortion in a class-D amplifier. The power output section of the amplifier is driven by an adjusted PWM signal, rather than by a PWM signal created directly from the input analog signal. A reference output, designed to closely track the input analog signal, is compared to the amplifier output. The resulting difference is an error signal which is inverted and summed with a second analog signal corresponding to the directly created PWM signal and changes the timing of the voltage transitions of the second analog signal. The changed voltage transitions are used to create the adjusted PWM signal. The inversion of the error signal causes negative feedback which results in the adjustment of the PWM signal being in a direction which reduces the error signal and thus the distortion of the amplifier.
Abstract translation: 本申请描述了用于减少D类放大器中的失真的装置和方法。 放大器的功率输出部分由调整后的PWM信号驱动，而不是直接由输入模拟信号产生的PWM信号驱动。 与输出模拟信号紧密跟踪的参考输出与放大器输出进行比较。 所产生的差异是将与直接产生的PWM信号对应的第二模拟信号反相并相加并且改变第二模拟信号的电压转换的定时的误差信号。 改变的电压转换用于创建调整后的PWM信号。 误差信号的反转引起负反馈，导致PWM信号的调整在减小误差信号的方向上，从而导致放大器的失真。
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公开(公告)号：US20130115906A1
公开(公告)日：2013-05-09
申请号：US13668253
申请日：2012-11-03
Applicant: ESS Technology, Inc.
Inventor： Dustin Dale Forman , A. Martin Mallinson , Robert Lynn Blair
IPC: H04B1/26
CPC classification number: H03D7/18 , H03D7/165 , H03D2200/0062 , H03D2200/0068 , H03D2200/0072
Abstract: A method and system is disclosed for designing a radio for down-converting RF signals to IF signals by sampling the signals in a round-robin sampling circuit and multiplying the samples by coefficients that are changed at a fixed rate equal to the rate of operation of each of the sampling circuits. The circuit is able to down-convert multiple channels simultaneously to adjacent positions in the IF band, while rejecting unwanted image signals. The method and system avoids the difficulty and cost of directly digitizing the RF signal, allowing each component to operate at a greatly reduced speed. The coefficients are selected to provide the desired transfer function while keeping the output signal centered at a desired frequency.
Abstract translation: 公开了一种用于设计用于将RF信号下变频成IF信号的无线电装置的方法和系统，该方法和系统是通过对循环采样电路中的信号进行采样并将采样乘以以等于 每个采样电路。 该电路能够将多个信道同时下变频到IF频带中的相邻位置，同时拒绝不需要的图像信号。 该方法和系统避免了直接数字化RF信号的困难和成本，从而允许每个组件以大大降低的速度运行。 选择系数以提供期望的传递函数，同时将输出信号保持在期望频率的中心。
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公开(公告)号：US20040212525A1
公开(公告)日：2004-10-28
申请号：US10810314
申请日：2004-03-26
Applicant: ESS Technology, Inc.
Inventor： Andrew Martin Mallinson
IPC: H03M001/66
CPC classification number: H03M1/0663 , H03M1/0614 , H03M1/0682 , H03M1/66
Abstract: A high quality DAC is provided for a lower cost (including the layout size of the circuit on an audio chip) of high end DACs. The DAC includes a first circuit configured to remove even harmonics from a sigma delta circuit, and a second circuit configured to remove odd harmonics.
Abstract translation: 高端DAC的低成本（包括音频芯片的电路布局尺寸）提供了高质量的DAC。 DAC包括被配置为从Σ-Δ电路去除偶次谐波的第一电路和被配置为去除奇数谐波的第二电路。
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公开(公告)号：US20040189397A1
公开(公告)日：2004-09-30
申请号：US10402391
申请日：2003-03-27
Applicant: ESS Technology, Inc.
Inventor： Andrew Martin Mallinson
IPC: H03F003/68
CPC classification number: H03F3/343 , H03F2200/453
Abstract: An electronic device is provided such as an amplifier, for example, having improved gain and transconductance and low output impedance. The device includes a primary amplifier configured to carry an operating load. The primary amplifier includes an input for receiving an input signal, and an output for outputting an output signal, and operates having a variable output, as it carries an operational load. The device further includes a secondary amplifier configured to operate at a fixed operating condition, not burdened by carrying an operational load, and includes a secondary input configured to receive the input signal, wherein the secondary amplifier is configured to define the input voltage. The device is configured to detect a difference in operating current between the primary and secondary. amplifiers, and to compensate for any operational load that may be applied to the primary amplifier during operation.
Abstract translation: 提供了诸如具有改善的增益和跨导和低输出阻抗的放大器的电子器件。 该装置包括被配置为承载操作负载的主放大器。 主放大器包括用于接收输入信号的输入端和用于输出输出信号的输出，并且在其承载操作负载时具有可变输出的操作。 该装置还包括辅助放大器，其被配置为在固定的工作状态下操作，而不承受运行负载的负担，并且包括被配置为接收输入信号的次级输入，其中辅助放大器被配置为限定输入电压。 该设备被配置为检测主要和次要之间的工作电流的差异。 放大器，并补偿在运行期间可能施加到主放大器的任何工作负载。
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Patent Agency Ranking
16.发明申请公开(公告)号：US20040103134A1
公开(公告)日：2004-05-27
申请号：US10722728
申请日：2003-11-25
Applicant: ESS Technology, Inc.
Inventor： Jordan C. Cookman , Ping Dong
IPC: G06F007/52
Abstract: A method and device are provided that allow computation of multiple modulus conversion (MMC) outputs using little or no division operations. Instead of division operations, multiplication and logical shift operations are used to produce pseudo-quotients and pseudo-remainders, which may be corrected in a final step to produce correct MMC outputs. This allows for more efficient implementation, since division is typically less efficient than multiplication and logical shift. The method and device operate on MMC inputs that may be partitioned into sub-quotients of varying numbers of digits in any numbering system. The multiplication and logical shift operations are performed on each of the sub-quotients according to a procedure derived from long-division techniques.
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公开(公告)号：US20030189507A1
公开(公告)日：2003-10-09
申请号：US10118224
申请日：2002-04-05
Applicant: ESS TECHNOLOGY, INC.
Inventor： Andrew Martin Mallinson
IPC: H03M001/36
CPC classification number: H03M1/367
Abstract: A differential input flash analog-to-digital converter in which an array of comparators is connected to compare reference signals within a parabolic distribution of such signals generated by the application of a differential input signal across an impedance network. Preferably, the comparator array comprises at least two pluralities of comparators, the first plurality of comparators comparing pairs of reference nodes separated by a first step size, and the second plurality of comparators comparing pairs of reference nodes separated by a second step size. Even more preferably, the comparator array further comprises a third plurality of comparators comparing pairs of reference nodes separated by a third step size, but only where necessary to maximize the available comparison range of the converter. The flash converter according to the invention provides increased gain from input without accumulation of comparator input currents and without sacrificing the number of actual comparisons of reference signals.
Abstract translation: 一种差分输入闪存模数转换器，其中连接比较器阵列以比较通过在阻抗网络上施加差分输入信号产生的这种信号的抛物面分布中的参考信号。 优选地，比较器阵列包括至少两个多个比较器，第一多个比较器比较由第一步长分隔的参考节点对，而第二多个比较器比较由第二步长分隔的参考节点对。 甚至更优选地，比较器阵列还包括第三多个比较器，其将由第三步长分隔的参考节点对进行比较，但仅在必要时使转换器的可用比较范围最大化。 根据本发明的闪存转换器从输入提供增加的增益，而不会累积比较器输入电流，并且不牺牲参考信号的实际比较的数量。
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18.发明申请公开(公告)号：US20030167291A1
公开(公告)日：2003-09-04
申请号：US10085760
申请日：2002-02-28
Applicant: ESS Technology, Inc.
Inventor： Jordan C. Cookman , Ping Dong
IPC: G06F007/00 , G06F015/00
Abstract: A method and device are provided that allow computation of multiple modulus conversion (MMC) outputs using little or no division operations. Instead of division operations, multiplication and logical shift operations are used to produce pseudo-quotients and pseudo-remainders, which may be corrected in a final step to produce correct MMC outputs. This allows for more efficient implementation, since division is typically less efficient than multiplication and logical shift. The method and device operate on MMC inputs that may be partitioned into sub-quotients of varying numbers of digits in any numbering system. The multiplication and logical shift operations are performed on each of the sub-quotients according to a procedure derived from long-division techniques.
Abstract translation: 提供了一种允许使用很少或没有分割操作来计算多模转换（MMC）输出的方法和装置。 代替分割运算，乘法和逻辑移位运算用于产生伪商和伪余数，这可以在最终步骤中进行校正，以产生正确的MMC输出。 这允许更有效的实现，因为除法通常比乘法和逻辑移位效率低。 该方法和装置在可以划分成任何编号系统中具有不同数字位数的子商品的MMC输入上操作。 根据从长分割技术导出的过程，对每个子商进行乘法和逻辑移位操作。
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公开(公告)号：US20190116414A1
公开(公告)日：2019-04-18
申请号：US16130979
申请日：2018-09-13
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
CPC classification number: H04R1/1083 , A61F11/06 , H03F3/45 , H03F3/45475 , H03F2200/03 , H03M1/02 , H04R2460/01
Abstract: An improved system and method for reducing the ambient noise experienced by a user listening to an earpiece without the use of a microphone is disclosed. An “ambient noise signal” created by the sound pressure wave of the ambient noise acting on the earpiece transducer is obtained. In some embodiments, the ambient noise signal is inverted and fed back, and the inverted signal is added to the intended audio signal being sent to the earpiece so that the ambient noise is cancelled. In other embodiments, a processor receives the ambient noise signal and predicts the modification to the intended audio signal needed to counteract the ambient noise. The ambient noise signal may be obtained by comparing the actual signal across the earpiece transducer to the intended audio signal, or by detecting variations in the current across the transducer from the current generated to drive the transducer.
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公开(公告)号：US20170366151A1
公开(公告)日：2017-12-21
申请号：US15620084
申请日：2017-06-12
Applicant: ESS Technology, Inc.
Inventor： A. Martin Mallinson
CPC classification number: H03G5/165 , H03G3/3005 , H03G3/32 , H03G5/005 , H03G5/025 , H03G5/24 , H03G9/025 , H03G9/18 , H04R3/007 , H04R3/04
Abstract: A circuit and method is disclosed for filtering an audio signal. The circuit has a first quadrature source and multipliers for multiplying the input signal by the I and Q outputs of the quadrature source. The multiplied inputs are then passed through a pair of low pass filters, which may have an adjustable Q factor. The outputs of the low pass filters are then multiplied in a second pair of multipliers by the I and Q outputs, respectively, of a second quadrature source, which will typically be of the same frequency, but different amplitude and phase, of the first quadrature source. The twice-multiplied signals are then summed by an adder to provide an output signal. The circuit may be modified to include a companding circuit between the low pass filters and the second pair of multipliers that determines the amplitude of the input signal, filters it, and compands the signal in a compandor. The compandor may have adjustable parameters. The circuit thus allows for far greater flexibility and control of the processing of the input signal than prior art circuits.
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