Motherboard having a non-volatile memory which is reprogrammable through a video display port

    公开(公告)号:US20060190646A1

    公开(公告)日:2006-08-24

    申请号:US11407601

    申请日:2006-04-19

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4243

    摘要: A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

    SWITCH FOR A TWO WAY CONNECTION BETWEEN A REMOVABLE CARD, A MOBILE WIRELESS COMMUNICATION DEVICE, OR A COMPUTER
    12.
    发明申请
    SWITCH FOR A TWO WAY CONNECTION BETWEEN A REMOVABLE CARD, A MOBILE WIRELESS COMMUNICATION DEVICE, OR A COMPUTER 审中-公开
    可移动卡,移动无线通信设备或计算机之间的两路连接切换

    公开(公告)号:US20100312926A1

    公开(公告)日:2010-12-09

    申请号:US12477799

    申请日:2009-06-03

    IPC分类号: G06F3/00 H04B7/005

    CPC分类号: H04M1/72527 H04M1/2535

    摘要: A USB switching device can selectively connect between a removable card and a mobile wireless communication device and a computer. The removable card has a first port; the mobile wireless communicating device has a second port while the computer has a third port. The switching device comprises a first full duplex switch having an input and a first output and a second output, and a select port for switching the connection of the input to the first output and the connection of the input to the second output. The switching device further comprises a second full duplex switch having an input and a first output and a second output, and a select port for switching the connection of the input to the first output and the connection of the input to the second output. The switching device further comprises a third full duplex switch having an input and a first output and a second output, and a select port for switching the connection of the input to the first output and the connection of the input to the second output. The input of the first switch is connected to the first port. The input of the second switch is connected to the second port. The input of the third switch is connected to the third port. The first output of the first switch is connected to the second output of the second switch. The second output of the first switch is connected to the first output of the third switch. Finally, the first output of the second switch is connected to the second output of the third switch.

    摘要翻译: USB切换设备可以选择性地连接可移动卡与移动无线通信设备和计算机之间。 可拆卸卡具有第一端口; 移动无线通信设备具有第二端口,而计算机具有第三端口。 开关装置包括具有输入和第一输出和第二输出的第一全双工开关,以及用于将输入连接到第一输出和将输入连接到第二输出的选择端口。 开关装置还包括具有输入和第一输出和第二输出的第二全双工开关,以及用于将输入连接到第一输出和将输入连接到第二输出的选择端口。 开关装置还包括具有输入和第一输出和第二输出的第三全双工开关,以及用于将输入连接到第一输出和将输入连接到第二输出的选择端口。 第一开关的输入连接到第一端口。 第二开关的输入连接到第二端口。 第三开关的输入连接到第三端口。 第一开关的第一输出连接到第二开关的第二输出端。 第一开关的第二输出端连接到第三开关的第一输出端。 最后,第二开关的第一输出连接到第三开关的第二输出端。

    Microcontroller having embedded non-volatile memory with read protection
    13.
    发明授权
    Microcontroller having embedded non-volatile memory with read protection 有权
    微控制器具有嵌入式非易失性存储器,具有读保护功能

    公开(公告)号:US06883075B2

    公开(公告)日:2005-04-19

    申请号:US10052327

    申请日:2002-01-17

    申请人: Fong-Long Lin Wei Xu

    发明人: Fong-Long Lin Wei Xu

    摘要: A single integrated circuit microcontroller 10 including embedded erasable/programmable non-volatile memory 12 having a read protection. Microcontroller 10 can operate within a special mode in which external circuits may access memory 12 by use of input/output pins 18. When microcontroller 10 activates this special mode, a read protection flag 13 within memory 12 is checked. The read protection flag 13 may be set during production of the microcontroller 10 after instructional data or firmware has been installed onto memory 12. If the read protection flag 13 has been set, the contents of memory 12 are erased or reprogrammed prior to allowing access to memory 12. In this manner, external circuits cannot access instructional data or firmware that is stored in memory 12.

    摘要翻译: 包括具有读取保护的嵌入式可擦除/可编程非易失性存储器12的单个集成电路微控制器10。 微控制器10可以在外部电路可以通过使用输入/输出引脚18访问存储器12的特殊模式中操作。 当微控制器10激活该特殊模式时,检查存储器12内的读保护标志13。 读取保护标志13可以在将指令数据或固件安装到存储器12上之后在微控制器10的生产期间被设置。 如果已经设置了读取保护标志13,则在允许访问存储器12之前,存储器12的内容被擦除或重新编程。 以这种方式,外部电路不能访问存储在存储器12中的指令数据或固件。

    Microcontroller having an embedded non-volatile memory array with read protection for the array or portions thereof
    14.
    发明授权
    Microcontroller having an embedded non-volatile memory array with read protection for the array or portions thereof 有权
    微控制器具有嵌入式非易失性存储器阵列,其具有阵列或其部分的读保护

    公开(公告)号:US06874069B2

    公开(公告)日:2005-03-29

    申请号:US10206635

    申请日:2002-07-26

    IPC分类号: G06F12/14

    CPC分类号: G06F12/1433

    摘要: A single integrated circuit microcontroller 10 includes an embedded erasable/programmable non-volatile memory 12 having a read protection capability. Microcontroller 10 can operate within a special mode in which external circuits may access memory 12 by use of input/output pins 18. When microcontroller 10 activates this special mode, a read protection flag 13 within memory 12 is checked. The read protection flag 13 may be set during production of the microcontroller 10 after instructional data or firmware has been installed onto memory 12. If the read protection flag 13 has been set, only certain portions of the memory 12 may be read, depending upon the value of the read protection flag 13.

    摘要翻译: 单个集成电路微控制器10包括具有读取保护能力的嵌入式可擦除/可编程非易失性存储器12。 微控制器10可以在外部电路可以通过使用输入/输出引脚18访问存储器12的特殊模式下操作。当微控制器10激活该特殊模式时,检查存储器12内的读保护标志13。 读取保护标志13可以在将指令数据或固件安装到存储器12之后在微控制器10的生产期间被设置。如果已经设置了读保护标志13,则只能读取存储器12的某些部分,这取决于 读取保护标志13的值。

    Method of testing an integrated circuit die, and an integrated circuit die

    公开(公告)号:US07851273B2

    公开(公告)日:2010-12-14

    申请号:US12762825

    申请日:2010-04-19

    IPC分类号: H01L21/82 H01L27/10

    CPC分类号: G01R31/2884

    摘要: In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

    Method of testing an integrated circuit die, and an integrated circuit die
    17.
    发明授权
    Method of testing an integrated circuit die, and an integrated circuit die 有权
    集成电路管芯的测试方法和集成电路管芯

    公开(公告)号:US07728361B2

    公开(公告)日:2010-06-01

    申请号:US12113881

    申请日:2008-05-01

    IPC分类号: H01L27/10 H01L21/82 H01L23/48

    CPC分类号: G01R31/2884

    摘要: In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

    摘要翻译: 在本发明中,公开了一种无包装集成电路管芯的测试方法。 管芯具有多个第一输入/输出焊盘。 在管芯中的不是第一多个(以下称为“第二多个”)的所有管芯的输入/输出焊盘之间在管芯中制造串联电连接。 第二组具有开始输入和结束输出。 第二多个的开始输入连接到第一多个输入焊盘的一个选择的输入缓冲器的输出,并且第二多个的输出端的输出也连接到第一多个的一个选择的输出焊盘的输入。 通过所选择的输入焊盘和第一组的选定的输出焊盘来测试第二组输入/输出焊盘,而不需要在晶片分类期间接触电探针。 本发明还涉及一种如此制造的便于测试的集成电路管芯。

    Hard disk drive cache memory and playback device
    18.
    发明授权
    Hard disk drive cache memory and playback device 有权
    硬盘驱动器缓存和播放设备

    公开(公告)号:US07519754B2

    公开(公告)日:2009-04-14

    申请号:US11637419

    申请日:2006-12-11

    IPC分类号: G06F13/00

    摘要: A NOR emulating device using a controller and NAND memories can be used in a computer system in placed of the main memory or in place of the BIOS NOR memory. Thus, the emulating device can function as a bootable memory. In addition, the device can act as a cache to the hard disk drive. Further, with the addition of an MP3 player controller into the device, the device can function as a stand alone audio playback device, even while the PC is turned off or is in a hibernating mode. Finally with the MP3 player controller, the device can access additional audio data stored on the hard drive, again with the PC in an off mode or a hibernating mode. Finally, the device can function to operate the disk drive, even while the PC is off or is in a hibernating mode, and control USB ports attached thereto.

    摘要翻译: 使用控制器和NAND存储器的NOR仿真装置可以在主存储器中放置的计算机系统中使用或代替BIOS NOR存储器。 因此,仿真装置可以用作可引导存储器。 此外,该设备可以充当硬盘驱动器的缓存。 此外,通过在设备中添加MP3播放器控制器,即使在PC关闭或处于休眠模式时,该设备也可以作为独立的音频播放设备。 最后使用MP3播放器控制器,设备可以访问存储在硬盘驱动器上的附加音频数据,同时PC处于关闭模式或休眠模式。 最后,即使在PC关闭或处于休眠模式,并且控制连接到其上的USB端口,该设备也可以用于操作磁盘驱动器。

    Motherboard having a non-volatile memory which is reprogrammable through a video display port and a non-volatile memory switchable between two communication protocols
    19.
    发明授权
    Motherboard having a non-volatile memory which is reprogrammable through a video display port and a non-volatile memory switchable between two communication protocols 有权
    主板具有可通过视频显示端口重新编程的非易失性存储器和可在两个通信协议之间切换的非易失性存储器

    公开(公告)号:US07069371B2

    公开(公告)日:2006-06-27

    申请号:US10798485

    申请日:2004-03-10

    IPC分类号: G06F13/14 G06F13/00

    CPC分类号: G06F13/4243

    摘要: A motherboard of a computer system has a video display port, a reprogrammable non-volatile memory, a controller for the non-volatile memory, and a graphics controller circuit for outputting video signals to the video display port. A wired-OR circuit connects the graphics controller circuit to the controller to the port. Thus, the video display port can be used to output video signals from the computer system to a peripheral video display device, and the video display port can be used as an input port to reprogram the non-volatile memory. The present invention also relates to a non-volatile memory device which has an array of non-volatile memory cells and two ports for communication therewith. A first port receives a first communication protocol and interfaces with the array in the first communication protocol. A second port receives a second communication protocol and converts the second communication protocol into the first communication protocol.

    摘要翻译: 计算机系统的主板具有视频显示端口,可再编程非易失性存储器,用于非易失性存储器的控制器,以及用于向视频显示端口输出视频信号的图形控制器电路。 有线电路将图形控制器电路连接到控制器到端口。 因此,可以使用视频显示端口将来自计算机系统的视频信号输出到外围视频显示装置,并且视频显示端口可以用作输入端口以重新编程非易失性存储器。 本发明还涉及一种具有非易失性存储器单元阵列和用于与其通信的两个端口的非易失性存储器件。 第一端口接收第一通信协议并与第一通信协议中的阵列接口。 第二端口接收第二通信协议并将第二通信协议转换为第一通信协议。

    Method of Testing an Integrated Circuit Die, and an Integrated Circuit Die
    20.
    发明申请
    Method of Testing an Integrated Circuit Die, and an Integrated Circuit Die 有权
    集成电路芯片的测试方法和集成电路模具

    公开(公告)号:US20100203654A1

    公开(公告)日:2010-08-12

    申请号:US12762825

    申请日:2010-04-19

    IPC分类号: H01L21/66

    CPC分类号: G01R31/2884

    摘要: In the present invention, a method of testing an unpackaged integrated circuit die is disclosed. The die has a plurality of first input/output pads. A serial electrical connection is fabricated in the die between all of the input/output pads of the die which are not of the first plurality (hereinafter: “second plurality”). The second plurality has a start input and an end output. The start input of the second plurality is connected to the output of one selected input buffer of the input pad of the first plurality and the end output of the second plurality is also connected to the input of one selected output pad of the first plurality. The second plurality of input/output pads are tested through selected input pad and selected output pad of the first plurality without electrical probes making contact during the wafer sort. The present invention also relates to an integrated circuit die so fabricated as to facilitate testing.

    摘要翻译: 在本发明中,公开了一种无包装集成电路管芯的测试方法。 管芯具有多个第一输入/输出焊盘。 在管芯中的不是第一多个(以下称为“第二多个”)的所有管芯的输入/输出焊盘之间在管芯中制造串联电连接。 第二组具有开始输入和结束输出。 第二多个的开始输入连接到第一多个输入焊盘的一个选择的输入缓冲器的输出,并且第二多个的输出端的输出也连接到第一多个的一个选择的输出焊盘的输入。 通过所选择的输入焊盘和第一组的选定的输出焊盘来测试第二组输入/输出焊盘,而不需要在晶片分类期间接触电探针。 本发明还涉及一种如此制造的便于测试的集成电路管芯。