摘要:
A matrix logic circuit network comprises a great number of interconnected logic gates. Input and output lines of the logic gates are arranged in the matrix array. By rearranging the input and output lines of the matrix in accordance with a sort algorithm, direct connection points of the input and output lines to which the same signals are allotted and connecting elements forming logic gates located at given intersections of the input and output lines are arranged within a diagonal area with a limited width, which extends along a diagonal line of the matrix.
摘要:
The vector processor of the present invention is designed to have a first function for classifying, generating and storing in advance a separate index set by judging the attribute of specified data and a second function for continuously performing operand access only for the index value belonging to the specified index set out of the index sets generated by the first function, thus avoiding the deterioration of the efficiency of pipeline processing even when the calculation of array data has different operation content according to the attributes of the specified data. Accordingly it can perform continuous calculation of a plurality of different conditioned expressions at high speed by arranging it to operate the first and the second functions concurrently with the value resulting from the operation by the second function being used by the first function as a data for discriminating the attribute of the data.
摘要:
A microprogram controlled system to which is applied the vertical type microprogramming technique. Microinstructions fetched from a control stage are decoded in a control decoder, which controls gates of registers in a central processor to execute the microinstructions. The microinstructions include an extension field in the format to modify the functions thereof.
摘要:
A synthetic resin composition which comprises 20 to 50 parts by weight of olefinic resins, 10 to 40 parts by weight of vinyl chloride resins, and 70 to 10 parts by weight of alumina trihydrate having a gibbsite crystal structure whose average particle size is 30 microns at most.
摘要:
An apparatus for replenishing paint into a paint cartridge (25), which is capable of putting paint in respiratory circulation while the cartridge is in a waiting state. The apparatus includes a replenishing valve (61) which is capable of feeding paint to and from a paint chamber (30) of the paint cartridge (25) which is set on a replenishing stool (52), and a respiratory paint circulation valve (91) which is capable of feeding paint-extruding thinner to and from a thinner chamber (31) of the cartridge. After switching the replenishing valve (61) to a drain or discharge side, paint-extruding thinner is supplied from the respiratory paint circulation valve (91) to push paint out of the paint chamber (30) of the cartridge (25). Then, after switching the replenishing valve (61) to the side of a paint supply source, paint-extruding thinner is discharged by way of the respiratory paint circulation valve (91) to suck paint into the paint chamber (30). As a consequence, paint in the cartridge (25) is put in respiratory circulation to prevent separation and sedimentation of pigment components of the paint.
摘要:
A disposable absorbent article such as a disposable diaper including first stretchable side flaps extending over transversely opposite outer zones of the diaper and second stretchable side flaps functioning as liquid-barriers each having a proximal edge and a distal edge arranged so as to define an exposed zone of a topsheet along each of transversely opposite side edge surfaces of a liquid-absorbent core and thereby, if a quantity of liquid excretions gets over the distal edge of the second side flaps, it can be absorbed by the liquid-absorbent core through the exposed zones.
摘要:
In a one-chip high density arithmetic control unit capable of prefetching user's instructions from main memory, an arithmetic logic unit (ALU) subtracts the contents of a location counter holding the address of the next instruction to be executed, from the contents of a memory address register holding an address into which data will be written. The difference is fed through the gates connected to the ALU for determining whether or not prefetched instructions will have to be refetched. An address matching mechanism provided outside the one-chip arithmetic control unit includes a comparator for comparing memory addresses to a preset execution stop address. The output signal of the comparator is stored in a memory section which is provided to correspond to the prefetched instruction buffer, and when an instruction stored in the prefetched instruction buffer is transferred to an instruction register, the signal stored in the corresponding memory section is also read out and used to determine whether to stop execution. Further, whenever access is made to main memory a signal indicating whether the access is legal is externally generated and may be stored in a second memory section. Like the address matching signal, this signal is read out when the corresponding instruction from the prefeteched instruction buffer is transferred to the instruction register. An illegal address interruption is produced when this signal indicates that the address was illegal.
摘要:
The invention relates to a manufacturing apparatus which comprises moving means which continuously moves the works that are transferred along a frame chute, and detector means which detects at least a portion of the work that is moved. The moving means is controlled by kind-of-work data and by a work position signal from the detector means, and the work is set to a predetermined position. Hence, even a work of a different kind can be set to an optimum bonding position without the need of exchanging the unit, making it possible to perform the operation fully automatically and to meet general purposes.Further, provision is made of means which moves the frame chute in a direction at right angles with the direction in which the work is moved, so that even that work that has different widths and shapes in the widthwise direction can be placed in position and subjected to the bonding fully automatically.The detector means can be provided not only at the bonding position but also at a position on the upstream side having a relation relative to the bonding position.The invention can be adapted particularly effectively to a wire bonder and a pellet bonder.
摘要:
A shift circuit comprises a plurality of stages of data selectors, a first data selector, a second data selector and a temporary register. The data selectors shift an n-bit input data by m bits which are specified by a shifting amount data and produces a first output data or a second output data. The first and second data selectors selectively output the first and second output data in accordance with shift direction. The temporary register comprises n bits for storing a data which is not selected by said first or second data selector.
摘要:
In an information processing system in which an arithmetic control unit is formed on one chip by very large scale integration and is connected to external devices by a common bus, microinstructions from an externally-connected control memory, memory information output from an external main memory and information output from I/O devices, can be received by the arithmetic control unit on the common bus. An external setting signal for selecting whether the instruction system of the arithmetic control unit is to be enabled or disabled is input to the arithmetic control unit on the common bus simultaneously with the fetching of a microinstruction. A bus width setting signal from an I/O device is also input to the arithmetic control unit on the common bus simultaneously with the fetching of a microinstruction, and the CPU determines whether the data width of an I/O device is 8 bits or 16 bits. An interruption signal from an I/O device and a signal indicating an abnormal condition of a power source, for example, may be input to the arithmetic control unit from external devices on the common bus as part of a group of external signals occupying only a portion of the common bus simultaneously with the fetching of a microinstruction on the remaining portion of the common bus. When exchanging a plurality of kinds of data with different phases between the arithmetic control unit and external devices on the common bus, an external status signal unique to each phase is input to the arithmetic control unit on a common signal line in synchronism with each phase.