公开(公告)号：US20050156207A1

公开(公告)日：2005-07-21

申请号：US10933339

申请日：2004-09-03

申请人： Yoshiaki Yazawa ,  Kazuki Watanabe ,  Masao Kamahori ,  Yukinori Kunimoto

发明人： Yoshiaki Yazawa ,  Kazuki Watanabe ,  Masao Kamahori ,  Yukinori Kunimoto

IPC分类号： G01N27/414 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8238 ,  H01L23/522 ,  H01L27/04 ,  H01L27/08 ,  H01L27/092 ,  H01L27/12 ,  H01L29/786 ,  H01L29/76

CPC分类号： G01N27/414 ,  G01N27/4148 ,  H01L27/1203 ,  H01L51/0098

摘要： A wireless sensor chip suitable for the compact, high-sensitive, and low-cost examination apparatus for easily examining a biological material such as gene at low cost is provided. A sensor chip is formed on an SOI substrate, and an n type semiconductor layer on which a pMOS transistor is formed and a p type semiconductor layer on which an nMOS transistor is formed are isolated by a pn junction. Therefore, the p type semiconductor layer at the outermost portion (chip edge portion to be in contact with solution) is set to floating, and the maximum potential and the minimum potential of the chip are supplied to an n type semiconductor layer and a p type semiconductor layer inside the outermost portion, respectively. Also, the chip is covered with an ion impermeable insulating film for reducing the penetration of positive ions through the oxide layer.

摘要翻译： 提供了适用于以低成本容易地检测诸如基因等生物材料的紧凑，高灵敏度，低成本的检查装置的无线传感器芯片。 传感器芯片形成在SOI衬底上，并且其上形成有pMOS晶体管的n型半导体层和其上形成nMOS晶体管的p型半导体层被pn结隔离。 因此，最外侧部分（与溶液接触的芯片边缘部分）的p型半导体层被设置为浮置，并且芯片的最大电位和最小电位被提供给n型半导体层和p型半导体 分别在最外部分内。 此外，芯片被不透水的绝缘膜覆盖，用于减少正离子穿过氧化物层的穿透。

公开(公告)号：US06637664B1

公开(公告)日：2003-10-28

申请号：US10018802

申请日：2001-12-21

申请人： Hiroshi Yoshigi ,  Takehiro Ookawa ,  Tadashi Oonishi ,  Kazuki Watanabe

发明人： Hiroshi Yoshigi ,  Takehiro Ookawa ,  Tadashi Oonishi ,  Kazuki Watanabe

IPC分类号： G06K1906

CPC分类号： G06K19/07769 ,  G06K19/07 ,  G06K19/0701 ,  G06K19/0723 ,  G06K19/077 ,  G06K19/07749 ,  G06K19/07779

摘要： For obtaining an IC card low in both power consumption and manufacturing cost, operating conditions in case of going through a contact point, which conditions are associated with supply voltage and signal level in an internal circuit, are to lie within operating conditions in case of going through an antenna. To this end, an IC chip of the IC card is provided with a voltage conversion circuit for lowering a supply voltage supplied through the contact point and a level conversion circuit for lowering the level of a signal fed from the contact point to the internal circuit and raising the level of a signal fed from the internal circuit to the contact point.

摘要翻译： 为了获得低功耗和制造成本的IC卡，在通过接触点的情况下的操作条件，哪些条件与内部电路中的电源电压和信号电平相关联，在进行的情况下处于工作条件下 通过天线。 为此，IC卡的IC芯片设置有用于降低通过接触点提供的电源电压的电压转换电路和用于降低从接触点馈送到内部电路的信号的电平的电平转换电路，以及 提高从内部电路馈送到接触点的信号的电平。

公开(公告)号：US08781537B2

公开(公告)日：2014-07-15

申请号：US13359495

申请日：2012-01-26

申请人： Kazuki Watanabe ,  Hisataka Tsunoda

发明人： Kazuki Watanabe ,  Hisataka Tsunoda

IPC分类号： H04B1/38

CPC分类号： G05F1/618 ,  G06K19/0723

摘要： The semiconductor integrated circuit includes: a pair of antenna terminals; a rectifier; a source-voltage terminal; a shunt regulator; a series regulator. When the voltage of the inside source line rises to or above a first set voltage, the shunt regulator passes a pull-down current through a pull-down transistor. When the voltage of the inside source line drops to or below the second set voltage, the series regulator passes a pull-up current through a pull-up transistor. The first set voltage is set to be higher than the second set voltage in voltage level. With the semiconductor integrated circuit, the competition of actions of the two regulators is prevented. The semiconductor integrated circuit is arranged to work in contact and noncontact operation modes, and a stable source voltage can be supplied to an internal circuit thereof.

摘要翻译： 半导体集成电路包括：一对天线端子; 整流器 源极电压端子; 分流调节器 一个系列调节器。 当内部源极线的电压上升到或高于第一设定电压时，分流调节器通过下拉晶体管通过下拉电流。 当内部源极线的电压下降到或低于第二设定电压时，串联调节器通过上拉晶体管传递上拉电流。 第一设定电压设定为高于电压电平的第二设定电压。 通过半导体集成电路，可以防止两个稳压器的动作竞争。 半导体集成电路被布置成以接触和非接触操作模式工作，并且可以向其内部电路提供稳定的源极电压。

公开(公告)号：US08200152B2

公开(公告)日：2012-06-12

申请号：US11585839

申请日：2006-10-25

申请人： Kazuki Watanabe

发明人： Kazuki Watanabe

IPC分类号： H04B5/00

CPC分类号： G06K19/0723 ,  G06K19/0713

摘要： There is provided a semiconductor integrated circuit provided with a charge pump circuit of low power consumption, capable of maintaining an output voltage thereof at a predetermined voltage level without causing current consumption to undergo intermittent variation, and a contactless electronic device using the semiconductor integrated circuit. With respective charge pump circuit unit cells (charge/discharge circuits) making up the charge pump circuit, charge current/discharge current flowing to or from the capacitor, respectively, is controlled according to the output voltage of the charge pump circuit. Accordingly, the charge pump circuit can maintain the output voltage thereof at the predetermined voltage level without undergoing an intermittent action. The charge current and discharge current are supplied from power supply terminals of a power supply circuit, current control is executed by a transistor, and a voltage outputted according to the output voltage of the charge pump circuit is supplied to the gate of the transistor.

摘要翻译： 提供一种半导体集成电路，其具有低功耗的电荷泵电路，能够将其输出电压保持在预定电压水平而不引起电流消耗发生间歇变化;以及使用该半导体集成电路的非接触电子器件。 通过构成电荷泵电路的各个电荷泵电路单元（充电/放电电路），分别根据电荷泵电路的输出电压来控制流入或流出电容器的充电电流/放电电流。 因此，电荷泵电路可以将其输出电压保持在预定电压水平，而不会发生间歇动作。 充电电流和放电电流由电源电路的电源端子提供，电流控制由晶体管执行，并且根据电荷泵电路的输出电压输出的电压被提供给晶体管的栅极。

公开(公告)号：US20120120989A1

公开(公告)日：2012-05-17

申请号：US13294536

申请日：2011-11-11

申请人： Akihiro TORIYAMA ,  Kazuki WATANABE ,  Makoto SHINDO ,  Makoto TOYOSHIMA ,  Yosuke TANNO

发明人： Akihiro TORIYAMA ,  Kazuki WATANABE ,  Makoto SHINDO ,  Makoto TOYOSHIMA ,  Yosuke TANNO

IPC分类号： H04B1/40

CPC分类号： G06K19/0712

摘要： There is included a detection unit for detecting a magnitude of a surplus of a direct current to a source voltage generated by a voltage generation unit generating the source voltage from the direct current obtained by rectifying a signal inputted from an antenna terminal. A data processing unit operating at the source voltage and performing data processing on a transmission/reception signal includes a clock control unit for determining a frequency of a clock signal for the data processing based on the magnitude of the surplus current detected by the detection unit in a state where a frequency of the clock signal is set to a predetermined reference frequency. Since the power consumed by the data processing unit at the time of detecting the surplus of the direct current is determined by the specific reference frequency, the surplus of the direct current can be detected as an absolute surplus.

摘要翻译： 包括检测单元，用于检测由从由天线端子输入的信号进行整流获得的直流电流产生源电压的电压产生单元产生的直流电流的剩余量。 以源电压工作并对发送/接收信号执行数据处理的数据处理单元包括时钟控制单元，用于基于由检测单元检测到的剩余电流的大小来确定用于数据处理的时钟信号的频率 将时钟信号的频率设定为规定的基准频率的状态。 由于在检测到直流电的剩余时由数据处理单元消耗的功率由特定参考频率确定，所以可以将直流的剩余检测为绝对剩余。

公开(公告)号：US08033534B2

公开(公告)日：2011-10-11

申请号：US12443610

申请日：2007-10-03

申请人： Tomoyuki Shinkai ,  Takahiro Harada ,  Kazuhiro Asayama ,  Kazuki Watanabe

发明人： Tomoyuki Shinkai ,  Takahiro Harada ,  Kazuhiro Asayama ,  Kazuki Watanabe

IPC分类号： B23B41/12 ,  B24B33/10

CPC分类号： B23Q3/062 ,  B24B33/02

摘要： In a dummy head (a jig for processing a cylinder block) having a dummy head body deforming a cylinder bore by assembling into a mounting surface of the cylinder block by bolt fastening, during the finish processing of the cylinder bore, a boss having a contact surface contacting a peripheral portion of the cylinder bore on the head mounting surface is provided on a mounting surface side for the cylinder block of the dummy head body, and at least the dummy head body has a higher rigidity than the cylinder block.

摘要翻译： 在具有虚拟头部的假人头（用于处理气缸体的夹具）中，其具有通过螺栓紧固而组装到气缸体的安装表面上而使气缸孔变形的虚拟头部，在气缸孔的精加工期间，具有接触 与头部安装面上的气缸孔的周边部分接触的表面设置在虚拟头部本体的气缸体的安装面上，至少虚拟头部本体具有比气缸体更高的刚性。

公开(公告)号：US07954969B2

公开(公告)日：2011-06-07

申请号：US11994724

申请日：2006-07-05

申请人： Kazuyuki Matsukawa ,  Masao Kamada ,  Wataru Tanaka ,  Kazuki Watanabe ,  Isao Nara ,  Yasuo Uemoto

发明人： Kazuyuki Matsukawa ,  Masao Kamada ,  Wataru Tanaka ,  Kazuki Watanabe ,  Isao Nara ,  Yasuo Uemoto

IPC分类号： G09F13/04

CPC分类号： G02F1/133604 ,  G02F1/133605 ,  G02F1/133611

摘要： Light which tries to enter a diffuser plate 3 at an angle which exceeds an angle at which a percentage of reflected light increases rapidly (that is, the incidence angle θ=70 degrees) is all reflected by a reflecting surface 21 and then enters the diffuser plate 3. Therefore, a pseudo light source is formed by light which was collected near a connection point between adjacent reflecting surfaces 21 out of the emitted light of the discharge lamps 1. So, the brightness between the adjacent discharge lamps 1 is increased, and it is possible to reduce unevenness in brightness. Furthermore, since the discharge lamp 1 is housed inside the reflecting surface 21 whose cross-sectional shape is a parabola, it is possible to reduce the distance between a reflecting plate 2 and the diffuser plate 3, as compared with the prior art, and to reduce the thickness dimension in the anteroposterior direction.

摘要翻译： 试图以超过反射光的百分比迅速增加的角度（即入射角度= 70度）的角度进入扩散板3的光全部被反射面21反射，然后进入 因此，通过在放电灯1的发射光的相邻反射面21之间的连接点附近聚集的光形成伪光源。因此，相邻的放电灯1之间的亮度增加， 并且可以减少亮度的不均匀性。 此外，由于放电灯1被容纳在横截面形状为抛物线的反射面21内，因此与现有技术相比可以减小反射板2和扩散板3之间的距离，并且 减少前后方向的厚度尺寸。

公开(公告)号：US20090109001A1

公开(公告)日：2009-04-30

申请号：US12222657

申请日：2008-08-13

申请人： Kazuki Watanabe ,  Masaaki Yamamoto ,  Takanori Yamazoe

发明人： Kazuki Watanabe ,  Masaaki Yamamoto ,  Takanori Yamazoe

IPC分类号： H04Q5/22

CPC分类号： G06K7/0008 ,  G06K19/0707 ,  G06K19/0723 ,  G06K19/07767

摘要： A wireless IC tag system according to the present invention is provided with a wireless IC tag, a reader/writer device and a high-frequency signal output device. The reader/writer device outputs a first high-frequency signal. The high-frequency signal output device outputs a second high-frequency signal only during a period when the reader/writer device outputs the first high-frequency signal. The wireless IC tag is provided with an antenna, a power supply circuit and a communication circuit. The antenna receives the first and second high-frequency signals. The power supply circuit generates a power supply voltage from the first and second high-frequency signals. The communication circuit transmits and receives an information signal to and from the reader/writer device by utilizing the first high-frequency signal.

摘要翻译： 根据本发明的无线IC标签系统具有无线IC标签，读写器装置和高频信号输出装置。 读/写器装置输出第一高频信号。 高频信号输出装置仅在读写器装置输出第1高频信号的期间输出第2高频信号。 无线IC标签设置有天线，电源电路和通信电路。 天线接收第一和第二高频信号。 电源电路从第一和第二高频信号产生电源电压。 通信电路通过利用第一高频信号向读取器/写入器装置发送和从读取器/写入器装置接收信息信号。

公开(公告)号：US20070176772A1

公开(公告)日：2007-08-02

申请号：US11491990

申请日：2006-07-25

申请人： Ryo Nemoto ,  Hiroshi Yoshigi ,  Yoshiaki Yazawa ,  Kazuki Watanabe

发明人： Ryo Nemoto ,  Hiroshi Yoshigi ,  Yoshiaki Yazawa ,  Kazuki Watanabe

IPC分类号： G08B1/08 ,  H04Q5/22 ,  G08B13/14

CPC分类号： G06K19/0717 ,  G06K7/0008 ,  G06K19/0701 ,  G06K19/0723

摘要： In an RFID system including RFID tags each incorporating a sensor, accuracy of measurement by the sensor can be improved. For example, when measurements are performed several times by using RFID tags each incorporating a sensor unit, generation of a carrier directed from an RFID reader/writer to the RFID tags is stopped for a predetermined period every time when a measurement ends. By this means, the chip temperature of the RFID tag increased due to power consumption in each measurement can be reduced to, for example, ambient temperature every time when a measurement ends. Therefore, an error in measurement by the sensor unit can be reduced, thereby achieving accurate measurement.

摘要翻译： 在包括RFID传感器的RFID标签中，传感器的测量精度可以提高。 例如，当通过使用包含传感器单元的RFID标签进行多次测量时，每当测量结束时，停止从RFID读取器/写入器引导到RFID标签的载体的预定时间的生成。 通过这种方式，每次测量结束时，每个测量中的功率消耗增加的RFID标签的芯片温度可以降低到例如环境温度。 因此，可以降低传感器单元的测量误差，从而实现精确的测量。

公开(公告)号：US07245513B2

公开(公告)日：2007-07-17

申请号：US11246367

申请日：2005-10-11

申请人： Kazuki Watanabe ,  Yoshiki Kawajiri ,  Hisataka Tsunoda

发明人： Kazuki Watanabe ,  Yoshiki Kawajiri ,  Hisataka Tsunoda

IPC分类号： H02M7/217

CPC分类号： H01Q1/2225 ,  H01L27/0705 ,  H01L2223/6677 ,  H01Q1/22 ,  H01Q1/38 ,  H01Q7/00

摘要： In a semiconductor integrated circuit device in which a rectifier device constituting a rectifier comprises a MOS transistor whose gate is connected to one antenna terminal and whose source is connected to the other antenna terminal, the parasitic capacitance applied between the antenna terminals increased. The present invention provides a technology for connecting a first MOS transistor whose gate is connected to a second input terminal between a first input terminal and a first output terminal, allowing an output terminal of a first bulk terminal control circuit, which is connected between the first and second input terminals, to control a bulk terminal of the first MOS transistor, and allowing an output terminal of a second bulk terminal control circuit, which is connected between the first and second input terminals, to control a bulk terminal of a second MOS transistor, which is connected between the second input terminal and the first output terminal.

摘要翻译： 在其中构成整流器的整流器件的半导体集成电路器件包括其栅极连接到一个天线端子并且其源极连接到另一个天线端子的MOS晶体管，在天线端子之间施加的寄生电容增加。 本发明提供了一种连接第一MOS晶体管的技术，该第一MOS晶体管的栅极连接到第一输入端和第一输出端之间的第二输入端，允许第一体积端子控制电路的输出端连接在第一 和第二输入端子，以控制第一MOS晶体管的体积端子，并且允许连接在第一和第二输入端子之间的第二体积端子控制电路的输出端子来控制第二MOS晶体管的体积端子 ，其连接在第二输入端子和第一输出端子之间。