Abstract:
A method for manufacturing a multilayer electronic component includes a step of preparing a laminate which includes a plurality of stacked insulator layers and a plurality of internal electrodes extending along the interfaces between the insulator layers, and in which an end of each of the plurality of internal electrodes is exposed at a predetermined surface corresponding to one of the first and second end surfaces; a step of forming external electrodes on the predetermined surfaces; and a step of forming thick-film edge electrodes at edge portions. The step of forming external electrodes includes a step of attaching a plurality of conductive particles having a particle size of about 1 μm or more to the predetermined surfaces of the laminate, and a step of performing plating directly on the predetermined surfaces to which the conductive particles are attached.
Abstract:
A ceramic electronic component includes a ceramic body and a plurality of external electrodes disposed at a surface of the ceramic body. The external electrodes include a plating layer containing glass particles each coated with a metal film. The plating layer is formed by co-deposition of a plating metal and the metal-coated glass particles.
Abstract:
A multilayer electronic device includes a laminate and an external electrode that is formed on an end surface of the laminate after a plurality of conductive particles having a particle diameter of about 1 μm or more is adhered to the end surface of the laminate, for example, by a sandblast method or a brush polishing method. The external electrode is defined by a plating film that is formed by electroplating or electroless plating.
Abstract:
A lock-up mechanism for a torque converter comprising a lock-up clutch secured thereto with a friction liner having a friction surface, and a front cover having an engaging surface adapted to be engaged with the friction surface, is wherein either the friction surface or the engaging surface is formed therein with a substantially annular circumferential groove.
Abstract:
A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
Abstract:
A method for manufacturing a laminated electronic component is performed such that a water-repellent agent is applied to end surfaces at which ends of internal electrodes are exposed so as to be filled in spaces along interfaces between insulating layers and the internal electrodes. Subsequently, an abrading step is performed such that the internal electrodes are sufficiently exposed at the end surfaces and an excess water-repellent agent is removed therefrom to enable plating films to be directly formed on the end surfaces.
Abstract:
There is provided a semiconductor circuit including three or more nodes at least including one input node and one output node, plural paths which are connected between the three or more nodes and whose signal propagation directions between the nodes are regulated, a signal propagation time regulator for regulating a signal propagation time of each of the paths, an input unit for inputting a predetermined input signal to the input node, and a detector for detecting a time required for the input signal to propagate through the paths and arrive at the output node.
Abstract:
A detecting means easily detects the abnormality of a generator having a plurality of power supply units. Each of the power supply units includes one of a plurality of output windings L1 to L4, which are wound independently of each other around single iron core, and one of rectifiers 2 to 5 that are provided in correspondence to the output windings and produces an integrated output. Controllers 33 to 35 control the rectifiers such that the output voltage corresponds with a target. A voltage deviation judgment section 37 outputs the abnormal signal when one of the output voltages of the rectifiers 2 to 5 is different from remains. A current deviation judgment section 39 outputs the abnormal signal when one of the output currents of the rectifiers 2 to 5 is different from remains. When the abnormal signal is detected, the outputs of the rectifiers 2 to 5 are stopped.
Abstract:
A detecting means easily detects the abnormality of a generator having a plurality of power supply units. Each of the power supply units includes one of a plurality of output windings L1 to L4, which are wound independently of each other around single iron core, and one of rectifiers 2 to 5 that are provided in correspondence to the output windings and produces an integrated output. Controllers 33 to 35 control the rectifiers such that the output voltage corresponds with a target. A voltage deviation judgment section 37 outputs the abnormal signal when one of the output voltages of the rectifiers 2 to 5 is different from remains. A current deviation judgment section 39 outputs the abnormal signal when one of the output currents of the rectifiers 2 to 5 is different from remains. When the abnormal signal is detected, the outputs of the rectifiers 2 to 5 are stopped.
Abstract:
In an ATM connectionless communication system for delivering connectionless datagram in the form of sessions through an ATM network, each one of multiple edge units is connected to a user network where quality-of-service (QoS) sessions and No-QoS sessions are mixed. Each of the edge units accommodates an IPv4 packet from the user network into an intermediate frame and accommodates the intermediate frame into ATM cells. The edge units are connected to core units by permanent virtual paths to form a connectionless network. Each of the edge units has a session supervising section for determining whether the IPv4 packet is a QoS session or a No-QoS session, to allocate a control flow number to the IPv4 packet when the IP4 packet is a QoS session.