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公开(公告)号：US20240170503A1
公开(公告)日：2024-05-23
申请号：US18283823
申请日：2022-10-31
Inventor： Haoyi XIN , Wei LI , Yanfeng LI , Jingjing XU , Min ZHANG , Rui FAN , Chenrong QIAO , Xiao YAN , Zhao LIU , Jing LI , Jianxiong FAN , Shangpeng LIU , Haidong SU
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1248 , G02F1/136209 , G02F1/136222 , G02F1/136286 , H01L27/124
Abstract: An array substrate, a liquid crystal display panel and a display apparatus. The array substrate comprises: a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a planarization layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B), the third insulating layer comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C), which are sequentially stacked; the first interlayer insulating layer is located on the side of the second interlayer insulating layer close to the substrate (10), the third interlayer insulating layer is located on the side of the second interlayer insulating layer away from the substrate; the material of the first interlayer insulating layer and third interlayer insulating layer comprises silicon oxide, the material of the second interlayer insulating layer comprises silicon nitride.
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公开(公告)号：US20240130187A1
公开(公告)日：2024-04-18
申请号：US18016931
申请日：2022-01-28
Inventor： Hong Liu , Jingyi Xu , Peng Liu , Yongqiang Zhang , Bo Huang , Guodong Wang , Wanzhi Chen
IPC: H10K59/131 , H10K59/12 , H10K59/80
CPC classification number: H10K59/1315 , H10K59/1201 , H10K59/8792
Abstract: The application provides a display substrate, a method for manufacturing the same, and a display device. The display substrate includes a display region and a binding region located at a periphery of the display region. The binding region is provided with a drive circuit pin and a flexible circuit board pin, and a connecting trace for connecting the drive circuit pin and the flexible circuit board pin. The connecting trace includes a first connecting line and a second connecting line connected in parallel, the first connecting line and the second connecting line are in different layers, the first connecting line is between an interlayer insulating layer and a base substrate of the display substrate, the first connecting line and the interlayer insulating layer are separated by a first insulating layer, and the second connecting line is on a side of the interlayer insulating layer away from the base substrate.
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公开(公告)号：US11881176B2
公开(公告)日：2024-01-23
申请号：US18150873
申请日：2023-01-06
Inventor： Yi Zhang , Kai Zhang , Minghua Xuan , Young Yik Ko , Lujiang Huangfu
IPC: G09G3/3258 , G09G3/3266 , G09G3/3275 , H10K59/131 , G09G3/3208 , G09G3/3233
CPC classification number: G09G3/3258 , G09G3/3208 , G09G3/3233 , G09G3/3266 , G09G3/3275 , G09G2300/0819 , G09G2300/0861 , G09G2310/0251 , G09G2310/0262 , G09G2320/0204 , G09G2320/045 , G09G2320/0693 , H10K59/131
Abstract: A pixel circuit, a display panel, a display device, and a driving method. The pixel circuit includes a light emitting element, a driving transistor, a light emitting control circuit, a reset circuit, a threshold compensation circuit, a first data write circuit, and an initializing circuit. The reset circuit includes a first transistor, the first data write circuit includes a third transistor, and a channel length-width ratio of the first transistor is greater than a channel length-width ratio of the third transistor.
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14.发明授权公开(公告)号：US11869976B2
公开(公告)日：2024-01-09
申请号：US17289200
申请日：2020-08-25
Inventor： Lei Yan , Jun Fan , Yezhou Fang , Feng Li , Wei Li , Lei Li , Yusheng Liu , Yanyan Meng
IPC: H01L29/786 , H01L27/12 , H01L29/417 , H01L29/66
CPC classification number: H01L29/78645 , H01L27/1222 , H01L29/41733 , H01L29/66757 , H01L29/78621 , H01L29/78675 , H01L29/78696
Abstract: A thin film transistor and a manufacturing method therefor, an array substrate, and a display device. The thin film transistor includes an active layer, a gate insulating layer, and a gate electrode; the gate insulating layer is located on one side of the active layer; the gate electrode is located on one side of the gate insulating layer distant from the active layer; the gate electrode includes an opening a part of the active layer overlapped with the opening includes a first lightly doped region, a first heavily doped region, and a second lightly doped region that are sequentially arranged along a first direction parallel to a plane where the active layer is located.
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公开(公告)号：US20230350255A1
公开(公告)日：2023-11-02
申请号：US17791338
申请日：2021-08-18
Inventor： Hong LIU , Jingyi XU , Xiaochun XU , Jiantao LIU , Wanzhi CHEN , Chengfu XU , Bo LI , Yongqiang ZHANG , Peng LIU , Ruirui HAO , Yu FENG , Xinguo WU
IPC: G02F1/1368 , H10K59/124
CPC classification number: G02F1/1368 , H10K59/124
Abstract: The present disclosure provides a display substrate and a display panel, and belongs to the field of display technology. The present display substrate includes a display region and a peripheral region surrounding the display region; the display substrate includes: a base substrate; a plurality of insulating layers sequentially arranged along a direction away from the base substrate; wherein each of the plurality of insulating layers is located in the display region and the peripheral region; one or more protrusion structures arranged between at least two adjacent ones of the plurality of insulating layers and in the peripheral region.
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Patent Agency Ranking
公开(公告)号：US11800740B2
公开(公告)日：2023-10-24
申请号：US17345026
申请日：2021-06-11
Inventor： Nini Bai , Liangliang Liu , Liman Peng
IPC: H10K50/844 , H10K50/842 , H10K59/122 , H10K71/00
CPC classification number: H10K50/844 , H10K50/8426 , H10K59/122 , H10K71/00
Abstract: A display panel includes a substrate. The substrate includes a display area, an encapsulation area, and a peripheral area between the display area and the encapsulation area. The peripheral area comprises a signal transmission layer disposed on the substrate, a protruding structure disposed on the signal transmission layer, and a first electrode layer covering a surface of the protruding structure. The first electrode layer is electrically connected to the signal transmission layer.
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公开(公告)号：US11776443B2
公开(公告)日：2023-10-03
申请号：US17052251
申请日：2020-04-08
Inventor： Jing Zhao , Xu Su , Shuang Zhao , Jigang Sun
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0408 , G09G2310/0267 , G09G2310/08 , G09G2330/021
Abstract: There is provided a gate driving circuit including cascaded Gate Driver On Array (GOA) units, each GOA unit drives a row of pixels and includes a starting sub-unit, an output sub-unit and an output terminal, in the GOA unit at a first stage, the starting sub-unit is coupled with a starting signal, a first control signal, a second control signal and a constant voltage potential, and the output sub-unit is coupled with a first clock signal and a first power supply signal; in the GOA unit at an nth stage, the starting sub-unit is coupled with the starting signal, the first control signal, the second control signal and the output terminal of the GOA unit at an (n−1)th stage, the output sub-unit is coupled with the first power supply signal and the output terminal of the GOA unit at an (n+1)th stage, n is an integer greater than 1.
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公开(公告)号：US11669180B2
公开(公告)日：2023-06-06
申请号：US17492179
申请日：2021-10-01
Inventor： Zhen Wang , Yun Qiao , Jian Sun , Xiaozhou Zhan , Jun Fan , Jianjun Zhang , Cheng Li , Hailin Xue
IPC: G06F3/041
CPC classification number: G06F3/0412 , G06F2203/04103
Abstract: A touch display substrate and a display device are provided. The touch display substrate includes a plurality of sub-pixel units (10), data lines (20) and touch signal lines (30). For any two adjacent rows of sub-pixel units, the sub-pixel unit (10) in one row of sub-pixel units is staggered in a row direction with respect to the sub-pixel unit (10) in the other row of sub-pixel units adjacent to the one row of sub-pixel units by a distance of X sub-pixel units (10), and 0
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公开(公告)号：US20230135576A1
公开(公告)日：2023-05-04
申请号：US17418137
申请日：2020-12-31
Inventor： Liman PENG , Yan WU , Qianqian ZHANG , Zhiyong XUE , Liang TANG , Guoping ZHANG , Qiang CHEN
Abstract: The present disclosure provides a display module, a display panel thinning method, a display panel, and a display device. The display module provided by the present disclosure includes: a display panel, a protective film located on a to-be-protected face of the display panel, a first anti-acid film located on the protective film, a second anti-acid film located on the first anti-acid film, and a sealant.
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公开(公告)号：US11630534B2
公开(公告)日：2023-04-18
申请号：US16476621
申请日：2019-01-10
Inventor： Yun Qiao , Zhen Wang , Xiaozhou Zhan , Han Zhang , Wenwen Qin , Peng Liu , Zhengkui Wang
Abstract: A wiring structure includes a plurality of first connection lines disposed in a first wiring layer and extending respectively from first ones of the plurality of first electrical contacts to first ones of the plurality of second electrical contacts, the first connection lines not intersecting each other; and a plurality of second connection lines disposed in a second wiring layer and extending respectively from second ones of the plurality of first electrical contacts to second ones of the plurality of second electrical contacts, the second connection lines not intersecting each other. An orthographic projection of any one of the first connection lines onto a plane parallel to the first and second wiring layers does not intersect an orthographic projection of any one of the second connection lines onto the plane.
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