Yttrium-doped bismuth titanate thin film and preparation thereof
    11.
    发明授权
    Yttrium-doped bismuth titanate thin film and preparation thereof 失效
    掺钇钛酸铋薄膜及其制备方法

    公开(公告)号:US07250228B2

    公开(公告)日:2007-07-31

    申请号:US10672753

    申请日:2003-09-26

    IPC分类号: B32B9/00 C23C16/00

    摘要: A bismuth yttrium titanate (BYT) film having the composition of formula (I) has enhanced residual polarization and electric fatigue properties with excellent ferroelectric property, and therefore, it can be advantageously used in an electric or electronic device including a FRAM device: Bi4-xYxTi3O12  (I) wherein x is an integer of 0.1 to 2.

    摘要翻译: 具有式(I)组成的铋钛酸铋(BYT)膜具有优异的铁电性能的增强的残余极化和电疲劳特性,因此可有利地用于包括FRAM器件的电气或电子设备中。 in-line-formula description =“In-line Formulas”end =“lead”?> Bi x 4 x x Y 3 x 3 (I)<?in-line-formula description =“In-line Formulas”end =“tail”?>其中x为0.1至2的整数。

    Non-volatile memory devices and methods of forming the same
    12.
    发明申请
    Non-volatile memory devices and methods of forming the same 失效
    非易失性存储器件及其形成方法

    公开(公告)号:US20060270156A1

    公开(公告)日:2006-11-30

    申请号:US11246454

    申请日:2005-10-07

    IPC分类号: H01L21/336 H01L29/788

    摘要: A non-volatile memory device includes an upwardly protruding fin disposed on a substrate and a control gate electrode crossing the fin. A floating gate is interposed between the control gate electrode and the fin and includes a first storage gate and a second storage gate. The first storage gate is disposed on a sidewall of the fin, and the second storage gate is disposed on a top surface of the fin and is connected to the first storage gate. A first insulation layer is interposed between the first storage gate and the sidewall of the fin, and a second insulation layer is interposed between the second storage gate and the top surface of the fin. The second insulation layer is thinner than the first insulation layer. A blocking insulation pattern is interposed between the control gate electrode and the floating gate.

    摘要翻译: 非易失性存储器件包括设置在衬底上的向上突出的翅片和跨过鳍片的控制栅电极。 浮栅位于控制栅极和鳍之间,并包括第一存储栅和第二存储栅。 第一存储门设置在翅片的侧壁上,第二存储栅极设置在鳍的顶表面上,并连接到第一存储门。 第一绝缘层插入在第一存储栅极和鳍片的侧壁之间,第二绝缘层插入在第二存储栅极和鳍的顶表面之间。 第二绝缘层比第一绝缘层薄。 在控制栅电极和浮栅之间插入阻挡绝缘图案。

    Structure for diagnosis system of reaction process
    14.
    发明授权
    Structure for diagnosis system of reaction process 有权
    反应过程诊断系统结构

    公开(公告)号:US07830505B2

    公开(公告)日:2010-11-09

    申请号:US12222332

    申请日:2008-08-07

    IPC分类号: G01J3/30

    摘要: The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.

    摘要翻译: 本发明涉及一种用于过程实时诊断的光谱分析仪,更具体地说,涉及用于对工艺进行实时诊断的光谱分析仪,其中将光束注入反应副产物或反应物,然后输出光束 ,由此对反应副产物或反应物进行定量和定性分析。

    Non-Volatile Memory Devices and Methods of Forming the Same
    15.
    发明申请
    Non-Volatile Memory Devices and Methods of Forming the Same 失效
    非易失性存储器件及其形成方法

    公开(公告)号:US20090081835A1

    公开(公告)日:2009-03-26

    申请号:US12274166

    申请日:2008-11-19

    IPC分类号: H01L21/336

    摘要: A non-volatile memory device includes an upwardly protruding fin disposed on a substrate and a control gate electrode crossing the fin. A floating gate is interposed between the control gate electrode and the fin and includes a first storage gate and a second storage gate. The first storage gate is disposed on a sidewall of the fin, and the second storage gate is disposed on a top surface of the fin and is connected to the first storage gate. A first insulation layer is interposed between the first storage gate and the sidewall of the fin, and a second insulation layer is interposed between the second storage gate and the top surface of the fin. The second insulation layer is thinner than the first insulation layer. A blocking insulation pattern is interposed between the control gate electrode and the floating gate.

    摘要翻译: 非易失性存储器件包括设置在衬底上的向上突出的翅片和跨过鳍片的控制栅电极。 浮栅位于控制栅极和鳍之间,并包括第一存储栅和第二存储栅。 第一存储门设置在翅片的侧壁上,第二存储栅极设置在鳍的顶表面上,并连接到第一存储门。 第一绝缘层插入在第一存储栅极和鳍片的侧壁之间,第二绝缘层插入在第二存储栅极和鳍的顶表面之间。 第二绝缘层比第一绝缘层薄。 在控制栅电极和浮栅之间插入阻挡绝缘图案。

    Quantum dot photovoltaic device and manufacturing method thereof
    17.
    发明授权
    Quantum dot photovoltaic device and manufacturing method thereof 有权
    量子点光电器件及其制造方法

    公开(公告)号:US08603849B2

    公开(公告)日:2013-12-10

    申请号:US13061297

    申请日:2009-08-28

    IPC分类号: H01L31/0264

    CPC分类号: H01L31/035218 H01L31/18

    摘要: The present invention provides a semiconductor based photovoltaic device and a manufacturing method thereof. The semiconductor based photovoltaic device is able to absorb light with a wide band wavelength, and has high photoelectric conversion efficiency since it has high electron-hole pair separation efficiency. More specifically, the method for manufacturing the photovoltaic device comprises the steps of: a) forming a thin semiconductor quantum dot film on a p or n-type semiconductor substrate, wherein the thin semiconductor quantum dot film includes semiconductor quantum dots inside a medium at which the same type of impurities as the semiconductor substrate are doped; b) forming a pore array through partial etching, wherein the pore array penetrates the thin semiconductor quantum dot film; c) depositing a semiconductor in which complementary impurities to the semiconductor substrate are doped on the thin semiconductor quantum dot film at which the pore array is formed; and d) forming sequentially a transparent conductive film and an upper electrode on the semiconductor in which the complementary impurities are doped and forming a lower electrode at a lower portion of the semiconductor substrate.

    摘要翻译: 本发明提供一种基于半导体的光电器件及其制造方法。 基于半导体的光电器件能够吸收宽带波长的光,并且由于具有高的电子 - 空穴对分离效率,因此光电转换效率高。 更具体地说,制造光伏器件的方法包括以下步骤:a)在p型或n型半导体衬底上形成薄的半导体量子点膜,其中薄的半导体量子点膜包括介质内的半导体量子点, 与半导体衬底掺杂相同类型的杂质; b)通过部分蚀刻形成孔阵列,其中孔阵列穿透薄的半导体量子点膜; c)在其上形成有孔阵列的薄半导体量子点膜上沉积半导体衬底掺杂杂质的半导体; 以及d)在所述半导体上顺序形成透明导电膜和上电极,其中所述互补杂质被掺杂并在所述半导体衬底的下部形成下电极。

    Structure for diagnosis system of reaction process
    18.
    发明申请
    Structure for diagnosis system of reaction process 有权
    反应过程诊断系统结构

    公开(公告)号:US20090046285A1

    公开(公告)日:2009-02-19

    申请号:US12222332

    申请日:2008-08-07

    IPC分类号: G01N21/25

    摘要: The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.

    摘要翻译: 本发明涉及一种用于过程实时诊断的光谱分析仪,更具体地说,涉及用于对工艺进行实时诊断的光谱分析仪,其中将光束注入反应副产物或反应物,然后输出光束 ,由此对反应副产物或反应物进行定量和定性分析。

    Eeprom and methods of fabricating the same
    19.
    发明申请
    Eeprom and methods of fabricating the same 审中-公开
    Eeprom及其制造方法

    公开(公告)号:US20070018230A1

    公开(公告)日:2007-01-25

    申请号:US11490768

    申请日:2006-07-21

    IPC分类号: H01L29/788

    摘要: An EEPROM includes a tunneling opening having an inclined or a stepped sidewall. A tunnel insulation layer is formed within the tunneling opening. Using a flowed photoresist pattern as an etching mask, the gate insulator is etched to form a tunneling opening having an inclined sidewall. Thus, the tunnel insulation layer can be formed in a smaller area than an area defined by a photolithography. As a result, a width of an active region and a width of a wordline are decreased to reduce a unit cell size.

    摘要翻译: EEPROM包括具有倾斜或阶梯状侧壁的隧道开口。 在隧道开口内形成隧道绝缘层。 使用流动的光致抗蚀剂图案作为蚀刻掩模,蚀刻栅极绝缘体以形成具有倾斜侧壁的隧道开口。 因此,隧道绝缘层可以形成在比由光刻限定的区域更小的区域中。 结果,有效区域的宽度和字线的宽度减小以减小单元电池尺寸。