摘要:
A bismuth yttrium titanate (BYT) film having the composition of formula (I) has enhanced residual polarization and electric fatigue properties with excellent ferroelectric property, and therefore, it can be advantageously used in an electric or electronic device including a FRAM device: Bi4-xYxTi3O12 (I) wherein x is an integer of 0.1 to 2.
摘要翻译:具有式(I)组成的铋钛酸铋(BYT)膜具有优异的铁电性能的增强的残余极化和电疲劳特性,因此可有利地用于包括FRAM器件的电气或电子设备中。 in-line-formula description =“In-line Formulas”end =“lead”?> Bi x 4 x x Y 3 x 3 (I)<?in-line-formula description =“In-line Formulas”end =“tail”?>其中x为0.1至2的整数。
摘要:
A non-volatile memory device includes an upwardly protruding fin disposed on a substrate and a control gate electrode crossing the fin. A floating gate is interposed between the control gate electrode and the fin and includes a first storage gate and a second storage gate. The first storage gate is disposed on a sidewall of the fin, and the second storage gate is disposed on a top surface of the fin and is connected to the first storage gate. A first insulation layer is interposed between the first storage gate and the sidewall of the fin, and a second insulation layer is interposed between the second storage gate and the top surface of the fin. The second insulation layer is thinner than the first insulation layer. A blocking insulation pattern is interposed between the control gate electrode and the floating gate.
摘要:
A semiconductor device includes transistors with a vertical gate electrode. In a transistor structure, a semiconductor pattern has first and second sides facing in a transverse direction, and third and fourth sides facing in a longitudinal direction. Gate patterns are disposed adjacent to the first and second sides of the semiconductor pattern. Impurity patterns directly contact the third and fourth sides of the semiconductor pattern. A gate insulating pattern is interposed between the gate patterns and the semiconductor pattern.
摘要:
The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.
摘要:
A non-volatile memory device includes an upwardly protruding fin disposed on a substrate and a control gate electrode crossing the fin. A floating gate is interposed between the control gate electrode and the fin and includes a first storage gate and a second storage gate. The first storage gate is disposed on a sidewall of the fin, and the second storage gate is disposed on a top surface of the fin and is connected to the first storage gate. A first insulation layer is interposed between the first storage gate and the sidewall of the fin, and a second insulation layer is interposed between the second storage gate and the top surface of the fin. The second insulation layer is thinner than the first insulation layer. A blocking insulation pattern is interposed between the control gate electrode and the floating gate.
摘要:
A flash memory device according to the present invention includes a semiconductor fin including a top surface and a side surface originated from different crystal planes. The flash memory device comprises: insulating layers having different thicknesses formed on a side surface and a top surface of the semiconductor fin, a storage electrode, a gate insulating layer and a control gate electrode sequentially formed on the insulating layers. A thin insulating layer enables charges to be injected or emitted through it, and a thick insulating layer increases a coupling ratio. Accordingly, it is possible to increase an efficiency of a programming or an erase operation of a flash memory device.
摘要:
The present invention provides a semiconductor based photovoltaic device and a manufacturing method thereof. The semiconductor based photovoltaic device is able to absorb light with a wide band wavelength, and has high photoelectric conversion efficiency since it has high electron-hole pair separation efficiency. More specifically, the method for manufacturing the photovoltaic device comprises the steps of: a) forming a thin semiconductor quantum dot film on a p or n-type semiconductor substrate, wherein the thin semiconductor quantum dot film includes semiconductor quantum dots inside a medium at which the same type of impurities as the semiconductor substrate are doped; b) forming a pore array through partial etching, wherein the pore array penetrates the thin semiconductor quantum dot film; c) depositing a semiconductor in which complementary impurities to the semiconductor substrate are doped on the thin semiconductor quantum dot film at which the pore array is formed; and d) forming sequentially a transparent conductive film and an upper electrode on the semiconductor in which the complementary impurities are doped and forming a lower electrode at a lower portion of the semiconductor substrate.
摘要:
The present invention relates to a spectroscopy analyzer for real-time diagnostics of process, and more particularly, to a spectroscopy analyzer for real-time diagnostics of process, in which a beam is injected to a reaction byproduct or a reactant and then an output beam is measured, thereby performing quantitative and qualitative analysis of the reaction byproduct or the reactant.
摘要:
An EEPROM includes a tunneling opening having an inclined or a stepped sidewall. A tunnel insulation layer is formed within the tunneling opening. Using a flowed photoresist pattern as an etching mask, the gate insulator is etched to form a tunneling opening having an inclined sidewall. Thus, the tunnel insulation layer can be formed in a smaller area than an area defined by a photolithography. As a result, a width of an active region and a width of a wordline are decreased to reduce a unit cell size.
摘要:
A semiconductor device includes transistors with a vertical gate electrode. In a transistor structure, a semiconductor pattern has first and second sides facing in a transverse direction, and third and fourth sides facing in a longitudinal direction. Gate patterns are disposed adjacent to the first and second sides of the semiconductor pattern. Impurity patterns directly contact the third and fourth sides of the semiconductor pattern. A gate insulating pattern is interposed between the gate patterns and the semiconductor pattern.