公开(公告)号：US20100060363A1

公开(公告)日：2010-03-11

申请号：US12423764

申请日：2009-04-14

申请人： Seon Ho Han ,  Kim Cheon Soo ,  Kim Jae Young ,  Yu Hyun Kyu

发明人： Seon Ho Han ,  Kim Cheon Soo ,  Kim Jae Young ,  Yu Hyun Kyu

IPC分类号： H03F3/191

CPC分类号： H03F1/26 ,  H03F1/565 ,  H03F3/195 ,  H03F2200/222 ,  H03F2200/294 ,  H03F2200/36 ,  H03F2200/451

摘要： A wideband low-noise amplifier includes a source-degenerated common-source amplifier, a common-gate amplifier, and a matching frequency band determiner. The source-degenerated common-source amplifier is configured to amplify an input signal to output a first signal that is opposite in phase to the input signal. The common-gate amplifier is connected in parallel to the source-degenerated common-source amplifier to amplify the input signal to output a second signal that has the same phase as the input signal. The matching frequency band determiner is configured to isolate an input terminal of the source-degenerated common-source amplifier and an input terminal of the common-gate amplifier and determine a matching frequency band.

摘要翻译： 宽带低噪声放大器包括源极退化的共源放大器，共栅放大器和匹配的频带确定器。 源极退化的共源放大器被配置为放大输入信号以输出与输入信号相位相反的第一信号。 共栅放大器与源极简并公共源放大器并联连接，以放大输入信号以输出与输入信号具有相同相位的第二信号。 匹配频带确定器被配置为隔离源极退化的共源极放大器的输入端和公共栅极放大器的输入端，并确定匹配的频带。

公开(公告)号：US06615398B2

公开(公告)日：2003-09-02

申请号：US10017315

申请日：2001-12-18

申请人： Hyun Kyu Yu ,  Seon-Ho Han ,  Mun Yang Park ,  Seong-Do Kim ,  Yong-Sik Youn ,  Lee-Sup Kim ,  Ki-Hyuk Sung ,  Byung-Do Yang ,  Young-Jun Kim

发明人： Hyun Kyu Yu ,  Seon-Ho Han ,  Mun Yang Park ,  Seong-Do Kim ,  Yong-Sik Youn ,  Lee-Sup Kim ,  Ki-Hyuk Sung ,  Byung-Do Yang ,  Young-Jun Kim

IPC分类号： G06F1750

CPC分类号： G06F1/0356 ,  G06F1/0328 ,  G06F2101/04 ,  G11C17/00

摘要： The present invention relates to a ROM division method for reducing the size of a ROM in a direct digital frequency synthesizer (DDFS), which is used to synthesize a frequency in a communication system requiring fast frequency conversion. A ROM consuming most energy in the system, a modified Nicholas architecture is brought forth to reduce the size of ROM. In this modified Nicholas architecture, a ROM is divided into coarse ROM and fine ROM to convert phase to sine value. The present invention divides the coarse ROM and the fine ROM into quantized ROM and error ROM respectively. Then, value stored in each ROM is segmented in certain intervals and the minimum quantized value in each of the section is stored in the quantized ROM, while the difference between the original ROM value and the quantized ROM value is stored in the error ROM. This way, the size of a ROM can be reduced. Phase value inputted in a DDFS, a sine value is calculated by adding the four ROM values, i.e., coarse-quantized ROM, coarse-error ROM, fine-quantized ROM and fine-error ROM.

公开(公告)号：US20130082756A1

公开(公告)日：2013-04-04

申请号：US13614262

申请日：2012-09-13

申请人： Jang Hong CHOI ,  Mun Yang PARK ,  Hyun Ho BOO ,  Seon-Ho HAN ,  Hyun Kyu YU

发明人： Jang Hong CHOI ,  Mun Yang PARK ,  Hyun Ho BOO ,  Seon-Ho HAN ,  Hyun Kyu YU

IPC分类号： H03K3/84

CPC分类号： H03C3/38

摘要： The present invention provides a signal input device of a digital-RF converter including: a phase-modulated signal input unit configured to input a phase-modulated carrier signal to an LO switch of a digital-RF converter; and a digital signal input unit configured to correct a digital signal to correspond to the phase-modulated carrier signal, and input the corrected digital signal to a data switch of the digital-RF converter.

摘要翻译： 本发明提供一种数字RF转换器的信号输入装置，包括：相位调制信号输入单元，被配置为将相位调制载波信号输入到数字RF转换器的LO开关; 以及数字信号输入单元，被配置为校正与所述相位调制载波信号相对应的数字信号，并将所述经校正的数字信号输入到所述数字RF转换器的数据开关。

公开(公告)号：US20110194657A1

公开(公告)日：2011-08-11

申请号：US13023248

申请日：2011-02-08

申请人： Seon-Ho HAN

发明人： Seon-Ho HAN

IPC分类号： H04B1/10

CPC分类号： H04B1/10

摘要： Provided is a frequency selective noise canceller including: a frequency selective single to differential converter having a band pass filter function, converting a received single input signal into a differential signal in a wanted signal pass frequency band and into a common mode signal in an unwanted signal frequency band; and a common mode rejector functioning as a load having an arbitrary impedance with respect to the differential signal outputted from the frequency selective single to differential converter and functioning as a filter with respect to the common mode signal.

摘要翻译： 提供了一种频率选择性噪声消除器，包括：具有带通滤波器功能的频率选择性单差分转换器，将接收的单个输入信号转换成有用信号通过频带中的差分信号，并将其转换成不需要的信号的共模信号 频带; 以及作为相对于从频率选择性单差分转换器输出的差分信号具有任意阻抗并且用作相对于共模信号的滤波器的负载的共模降压器。

公开(公告)号：US20110148684A1

公开(公告)日：2011-06-23

申请号：US12970861

申请日：2010-12-16

申请人： Hyun Kyu Yu ,  Seon Ho Han ,  Young Hwa Kim ,  Seong Hwan Cho

发明人： Hyun Kyu Yu ,  Seon Ho Han ,  Young Hwa Kim ,  Seong Hwan Cho

IPC分类号： H03M1/38

CPC分类号： H03M1/46 ,  H03M1/827

摘要： There is provided a successive approximation analog-to-digital converter including only minimal capacitors to perform an analog-to-digital conversion operation, thereby making it possible to have very strong process change resistance characteristics while having reduced capacitance and circuit area. The successive approximation analog-to-digital converter may include a reference current supplying unit that supplies a reference current; a signal storage unit that stores a reference signal generated by charging the reference current and an input signal input from the outside; a comparing unit that compares the reference signal and the input signal; and a controller that controls the reference current supplying unit while generating the digital output signal based on the comparison result of the comparing unit to change the supply amount of the reference current supplied to the signal storage unit in proportion to the binary code.

摘要翻译： 提供了仅包括最小电容器以执行模数转换操作的逐次逼近模数转换器，从而使得可以具有非常强的工艺变化电阻特性，同时具有减小的电容和电路面积。 逐次逼近模数转换器可以包括提供参考电流的参考电流提供单元; 信号存储单元，存储通过对参考电流进行充电而产生的参考信号和从外部输入的输入信号; 比较单元，其比较所述参考信号和所述输入信号; 以及控制器，其基于所述比较单元的比较结果来控制所述参考电流供给单元，同时根据所述二进制码来改变提供给所述信号存储单元的参考电流的供给量。

公开(公告)号：US07688155B2

公开(公告)日：2010-03-30

申请号：US11645893

申请日：2006-12-27

申请人： Seon-Ho Han ,  Cheon-Soo Kim

发明人： Seon-Ho Han ,  Cheon-Soo Kim

IPC分类号： H03B5/18

CPC分类号： H03B5/1243 ,  H03B5/1293

摘要： Provided is an apparatus having a variable capacitor circuit which is capable of obtaining a constant gain with respect to a whole control voltage by using a linear variable frequency characteristic for a variation of the control voltages, to thereby attain a wide variable frequency range. For this, a variable capacitor circuit includes a plurality of variable capacitors being connected in parallel with each other and having different capacitances with respect to an input control voltage, wherein the sum of the variable capacitances of the plurality of variable capacitors at a same voltage level of the control voltage varied within the whole control voltage range has linearity.

摘要翻译： 提供一种具有可变电容器电路的装置，其可以通过使用用于控制电压的变化的线性可变频率特性来获得相对于整个控制电压的恒定增益，从而获得宽的可变频率范围。 为此，可变电容电路包括彼此并联连接并且相对于输入控制电压具有不同电容的多个可变电容器，其中在相同电压电平下的多个可变电容器的可变电容之和 的控制电压在整个控制电压范围内变化有线性关系。

公开(公告)号：USRE40424E1

公开(公告)日：2008-07-08

申请号：US11318392

申请日：2005-12-22

申请人： Seon-Ho Han ,  Jang-Hong Choi ,  Jae-Hong Jang ,  Hyun-Kyu Yu

发明人： Seon-Ho Han ,  Jang-Hong Choi ,  Jae-Hong Jang ,  Hyun-Kyu Yu

IPC分类号： H03K21/00

CPC分类号： H03M7/3022 ,  H03L7/1978

摘要： The present invention relates to a structure of a delta-sigma fractional type divider. The divider structure adds an external input value and an output value of a delta-sigma modulator to modulate a value of a swallow counter. Therefore, the present invention can provide a delta-sigma fractional type divider the structure is simple and that can obtain an effect of a structure of a delta sigma mode while having a wide-band frequency mixing capability.

摘要翻译： 本发明涉及一种delta-sigma分数型分频器的结构。 分频器结构增加了Δ-Σ调制器的外部输入值和输出值，以调制吞咽计数器的值。 因此，本发明可以提供一种Δ-Σ分数分频器，其结构简单，并且可以获得具有宽带频率混合能力的Δ-Σ模式的结构的效果。

公开(公告)号：US20060135086A1

公开(公告)日：2006-06-22

申请号：US11224811

申请日：2005-09-12

申请人： Seon-Ho Han ,  Mun-Yang Park ,  Hyun-Kyu Yu ,  Cheon-Soo Kim

发明人： Seon-Ho Han ,  Mun-Yang Park ,  Hyun-Kyu Yu ,  Cheon-Soo Kim

IPC分类号： H04B1/46

CPC分类号： H04B1/405

摘要： Provided is a wireless transceiving apparatus for variability of signal processing band, in which at least one resonator of an analog processor and a VCO are simultaneously controlled using a frequency synthesizer, and a frequency of the VCO and a resonance frequency of the analog processor are controlled to have a rational number ratio, thereby capable of varying the signal processing band. The wireless transceiving apparatus includes: an analog processor having a plurality of resonators on a path of transmission/reception signals, for performing analog signal processing; a digital processor for performing digital signal processing on an output signal of the analog processor or data to be transmitted to the analog processor; and a frequency synthesizer for providing a local oscillation (LO) frequency and a controlling signal to the resonators of the analog processor so as to vary a signal processing band of the analog processor.

摘要翻译： 提供了一种用于信号处理频带的可变性的无线收发装置，其中使用频率合成器同时控制模拟处理器和VCO的至少一个谐振器，并且控制VCO的频率和模拟处理器的谐振频率 具有有理数比，从而能够改变信号处理频带。 无线收发装置包括：模拟处理器，在发送/接收信号的路径上具有多个谐振器，用于执行模拟信号处理; 用于对模拟处理器的输出信号执行数字信号处理的数字处理器或将被发送到模拟处理器的数据; 以及用于向模拟处理器的谐振器提供本地振荡（LO）频率和控制信号以便改变模拟处理器的信号处理频带的频率合成器。

公开(公告)号：US06605996B2

公开(公告)日：2003-08-12

申请号：US10039542

申请日：2001-12-31

申请人： Hyun Kyu Yu ,  Sang-Gug Lee ,  Mun Yang Park ,  Seong-Do Kim ,  Yong-Sik Youn ,  Seon-Ho Han ,  Nam-Soo Kim

发明人： Hyun Kyu Yu ,  Sang-Gug Lee ,  Mun Yang Park ,  Seong-Do Kim ,  Yong-Sik Youn ,  Seon-Ho Han ,  Nam-Soo Kim

IPC分类号： H03F345

CPC分类号： H03G1/007 ,  H03F3/45179 ,  H03F2203/45492 ,  H03G1/0023

摘要： An automatically gain controllable linear differential amplifier using a variable degeneration resistor is disclosed. The linear differential amplifier includes an input end, a bias current source, a load unit, a first MOS transistor and a second MOS transistor. The linear differential amplifiers of the present invention can control an amplifying gain according to an input signal and improve linearity IIP3 without needing additional power consumption caused by improving the linearity. The automatically gain controllable linear differential amplifier uses NMOS/PMOS transistor so an integration process of the amplifier can be implemented more conveniently and efficiently.

摘要翻译： 公开了一种使用可变退化电阻的自动增益可控线性差分放大器。 线性差分放大器包括输入端，偏置电流源，负载单元，第一MOS晶体管和第二MOS晶体管。 本发明的线性差分放大器可以根据输入信号控制放大增益，并提高线性度IIP3，而不需要通过提高线性度而引起的附加功耗。 自动增益可控线性差分放大器使用NMOS / PMOS晶体管，因此可以更方便，高效地实现放大器的集成过程。

公开(公告)号：US09294135B2

公开(公告)日：2016-03-22

申请号：US13609638

申请日：2012-09-11

申请人： Ik Soo Eo ,  Sang-Kyun Kim ,  Mun Yang Park ,  Seon-Ho Han ,  Hyun Kyu Yu

发明人： Ik Soo Eo ,  Sang-Kyun Kim ,  Mun Yang Park ,  Seon-Ho Han ,  Hyun Kyu Yu

IPC分类号： H04B1/00

CPC分类号： H04B1/0021

摘要： A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.

摘要翻译： 数字RF接收机根据用于多模式接收，MIMO接收和带宽扩展接收的模式和频带不使用单独的接收机，并且仅改变单个接收机结构中的设置变量以便实现多模式接收， MIMO接收，带宽扩展接收和/或同时多模式操作，从而可以减少接收机的复杂性，开发成本和功耗。