公开(公告)号：US09385183B2

公开(公告)日：2016-07-05

申请号：US14434388

申请日：2012-12-06

申请人： Ze Chen ,  Tsuyoshi Kawakami ,  Katsumi Nakamura

发明人： Ze Chen ,  Tsuyoshi Kawakami ,  Katsumi Nakamura

IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392 ,  H01L29/06 ,  H01L29/739 ,  H01L29/423

CPC分类号： H01L29/0619 ,  H01L29/0638 ,  H01L29/4236 ,  H01L29/7395 ,  H01L29/7397

摘要： The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers are regularly arranged in the ring region (LNFLR). The ring region (LNFLR) is divided into a plurality of units which include the plurality of P-type ring layers respectively. A width of each unit is constant. A total number of P-type impurities in the ring region (LNFLR) is N, the target withstand voltage is BV [V], a width of each unit is SandL [μm], and the number of the plurality of units is num, following relationships are satisfied. N≧(M×BV)γ, M=104 to 105, γ=0.55 to 1.95, SandL×num×Ecri≧2×α×BV, Ecri=2.0 to 3.0×105 [V/cm], α=100 to 101. Widths of the P-type ring layers of the plurality of units linearly decrease toward an outside of the termination region.

摘要翻译： 终端区域包括环形区域（LNFLR）。 多个环形P型环层规则地布置在环形区域（LNFLR）中。 环区域（LNFLR）被分成多个单元，分别包括多个P型环层。 每个单位的宽度是恒定的。 环状区域（LNFLR）中的P型杂质的总数为N，目标耐受电压为BV [V]，每个单位的宽度为SandL [μm]，多个单位的数量为num， 满足以下关系。 N≥（M×BV）γ，M = 104〜105，γ= 0.55〜1.95，SandL×num×Ecri≥2×α×BV，Ecri = 2.0〜3.0×105 [V / cm]，α= 多个单元的P型环层的宽度朝着端接区域的外侧线性地减小。

公开(公告)号：US09041051B2

公开(公告)日：2015-05-26

申请号：US14111168

申请日：2011-07-05

申请人： Ze Chen ,  Katsumi Nakamura

发明人： Ze Chen ,  Katsumi Nakamura

IPC分类号： H01L29/36 ,  H01L29/739 ,  H01L29/861 ,  H01L29/06 ,  H01L29/08

CPC分类号： H01L29/7397 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0696 ,  H01L29/0821 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/41708 ,  H01L29/7393 ,  H01L29/861

摘要： An insulated gate bipolar transistor having a gate electrode (7) and an emitter electrode (9) is provided in a transistor region. A termination region is arranged around the transistor region. A first N type buffer layer (18) is provided below an N type drift layer (1) in the transistor region. A P type collector layer (19) is provided below the first N type buffer layer (18). A second N type buffer layer (20) is provided below the N type drift layer (1) in the termination region. A collector electrode (21) is directly connected to the P type collector layer (19) and the second N type buffer layer (20). An impurity concentration of the second N type buffer layer (20) decreases as a distance from the collector electrode (21) decreases. The second N type buffer layer (20) does not form any ohmic contact with the collector electrode (21).

摘要翻译： 具有栅极（7）和发射极（9）的绝缘栅双极晶体管设置在晶体管区域中。 端子区域布置在晶体管区域周围。 第一N型缓冲层（18）设置在晶体管区域中的N型漂移层（1）的下方。 在第一N型缓冲层（18）的下方设置有P型集电体层（19）。 第二N型缓冲层（20）设置在终端区域中的N型漂移层（1）的下方。 集电极（21）直接连接到P型集电极层（19）和第二N型缓冲层（20）。 随着与集电极（21）的距离减小，第二N型缓冲层（20）的杂质浓度降低。 第二N型缓冲层（20）不与集电极（21）形成任何欧姆接触。

公开(公告)号：US20100192953A1

公开(公告)日：2010-08-05

申请号：US12562571

申请日：2009-09-18

申请人： Gary C.J. Lee ,  Ming-Ze Chen

发明人： Gary C.J. Lee ,  Ming-Ze Chen

IPC分类号： A61M16/08

CPC分类号： A61M16/0078 ,  A61M16/0463 ,  A61M16/06 ,  A61M16/0816 ,  A61M16/0833 ,  A61M2202/0208 ,  A61M2205/583

摘要： A hyperinflation system includes an airbag having an air inlet and an air outlet, and a one-piece multi-way connector including a base, a first tube section projecting from a first side of the base and connected to the air outlet, a second tube section projecting from a second side of the base oppositely of the first tube section, and a pressure gauge projecting from the second side of the base. A multi-port adaptor includes a first port connected fluidly to the second tube section, and a second port adapted for connection with a patient interface.

摘要翻译： 恶性通气系统包括具有空气入口和空气出口的气囊，以及包括基座的一体式多路连接器，从基座的第一侧突出并与空气出口连接的第一管段，第二管 从所述基座的与所述第一管部相反的第二侧突出的部分，以及从所述基部的第二侧突出的压力计。 多端口适配器包括流体地连接到第二管部分的第一端口和适于与患者接口连接的第二端口。

公开(公告)号：US20040076477A1

公开(公告)日：2004-04-22

申请号：US10633311

申请日：2003-08-04

申请人： Ze CHEN

发明人： Zhenxin Chen ,  Ze Chen

IPC分类号： E02B001/00 ,  E02D023/00

CPC分类号： E02B3/06 ,  E02D23/00 ,  E02D27/52 ,  Y02A10/15

摘要： The present invention discloses an underwater building unit and its installation and application methods. It includes a caisson with both ends open and is composed of two rows of box boards being not intersected with each other. Each row of box boards consists of a set of stake-plate body combinations and the bind members between every two adjacent stake-plate body combinations. A positioning beam is located on the top of the box boards and connects the two box boards. There is a cross rib at the middle part of the outer surface of each bind member. The open caisson is made up of small components of low weight. So it is easy for installation and could be extended unlimitedly as required. In addition, the underwater building unit has low underwater condition requirement and is relatively stable, thus the underwater building is quite firm and has a long life. Each component of the open caisson can be industrially manufactured on land so as to lower the cost and free of the influence of stormy waves.

摘要翻译： 本发明公开了一种水下建筑单元及其安装和应用方法。 它包括一个两端打开的沉箱，由两排彼此不相交的盒子组成。 每排箱板由一组桩板组合和每两个相邻的桩板组合之间的绑定构件组成。 定位梁位于盒板的顶部，并连接两个盒子板。 在每个装订构件的外表面的中部有一个横肋。 开放式沉箱由重量轻的小部件组成。 因此，安装容易，可根据需要无限扩展。 此外，水下建筑单元水下条件要求低，相对稳定，水下建筑相当坚固，寿命长。 开放式沉箱的每个部件可以在陆地上工业化生产，以降低成本并且不受风雨波浪的影响。

公开(公告)号：US11228168B2

公开(公告)日：2022-01-18

申请号：US16654274

申请日：2019-10-16

申请人： Ze Chen

发明人： Boon Lum Lim ,  Samuel Raj

IPC分类号： H02H3/04 ,  G01R31/52 ,  H02H1/00 ,  G01R19/02 ,  H01H71/04 ,  H01H83/04 ,  H01H71/62 ,  G01R19/165 ,  G01R19/04 ,  H02H3/16 ,  H02H3/38 ,  H01H71/58 ,  H01H83/20 ,  G01R31/12

摘要： In one example, an arc fault circuit interrupter (AFCI) is provided. The AFCI may include a plurality of current arc signature detection blocks configured to output a plurality of corresponding current arc signatures, and a processor. The processor may be configured to receive each of the plurality of current arc signature from each of plurality of current arc signature detection blocks, respectively, and generate a first trigger signal. The processor may be further configured to assess each of the current arc signatures, determine whether an arc fault exists based on the assessment, and generate the first trigger signal if an arc fault is determined to exist. A method for detecting an arc fault is also provided.

公开(公告)号：US11165240B2

公开(公告)日：2021-11-02

申请号：US16511064

申请日：2019-07-15

申请人： Ze Chen

发明人： Ze Chen ,  Boon Lum Lim ,  Samuel Raj

IPC分类号： H02H3/33 ,  H02H3/07 ,  H02H3/16 ,  H02H3/17 ,  H02H1/00

摘要： In one example, a ground fault circuit interrupter is provided. It may include a current imbalance detection circuit configured to provide a leakage signal and a main processing circuit including a processor. The leakage signal may correspond to a current imbalance between a supply path and a return path. The processor may be configured to receive the leakage signal, analyze a time pattern of the leakage signal, determine whether a ground fault exists based on analysis of the time pattern, and generate a first trigger signal if the ground fault is determined to exist. The ground fault circuit interrupter may further include a back-EMF detection circuit configured to provide a back-EMF detection signal. Methods for detecting and responding to a ground fault are also provided.

公开(公告)号：US20210028619A1

公开(公告)日：2021-01-28

申请号：US16777787

申请日：2020-01-30

申请人： Ze CHEN

发明人： Ze CHEN ,  Xincheng PAN ,  Ye ZHANG

IPC分类号： H02H3/33

摘要： The present disclosure relates to a power supply grounding fault protection circuit. A power supply grounding fault protection circuit may include a power supply circuit, a leakage grounding detection circuit, a signal amplifying and shaping circuit, a microcontroller control circuit, a power supply detection and indicator circuit, a tripping mechanism control circuit, a reverse grounding detection and execution circuit, a wireless network circuit, and an automatic resetting circuit. The practice of the present disclosure may permit a user to reset the grounding fault circuit interrupter remotely after a leaking fault of a circuit is eliminated.

公开(公告)号：US10594131B2

公开(公告)日：2020-03-17

申请号：US15375324

申请日：2016-12-12

申请人： Ze Chen

发明人： Ze Chen ,  Xincheng Pan ,  Ye Zhang

IPC分类号： H02H3/33

摘要： The present disclosure relates to a power supply grounding fault protection circuit. A power supply grounding fault protection circuit may include a power supply circuit, a leakage grounding detection circuit, a signal amplifying and shaping circuit, a microcontroller control circuit, a power supply detection and indicator circuit, a tripping mechanism control circuit, a reverse grounding detection and execution circuit, a wireless network circuit, and an automatic resetting circuit. The practice of the present disclosure may permit a user to reset the grounding fault circuit interrupter remotely after a leaking fault of a circuit is eliminated.

公开(公告)号：US20190341767A1

公开(公告)日：2019-11-07

申请号：US16511064

申请日：2019-07-15

申请人： Ze CHEN

发明人： Ze CHEN ,  Boon Lum LIM ,  Samuel RAJ

IPC分类号： H02H3/17 ,  H02H3/07 ,  H02H1/00

摘要： In one example, a ground fault circuit interrupter is provided. It may include a current imbalance detection circuit configured to provide a leakage signal and a main processing circuit including a processor. The leakage signal may correspond to a current imbalance between a supply path and a return path. The processor may be configured to receive the leakage signal, analyze a time pattern of the leakage signal, determine whether a ground fault exists based on analysis of the time pattern, and generate a first trigger signal if the ground fault is determined to exist. The ground fault circuit interrupter may further include a back-EMF detection circuit configured to provide a back-EMF detection signal. Methods for detecting and responding to a ground fault are also provided.

公开(公告)号：US10410816B2

公开(公告)日：2019-09-10

申请号：US15582746

申请日：2017-04-30

申请人： Ze Chen

发明人： Ze Chen ,  Boon Lum Lim ,  Samuel Raj

IPC分类号： H01H71/02 ,  H02H1/00 ,  H01H71/04 ,  H01H71/62 ,  H01H83/04 ,  H02H3/32 ,  H01H71/24 ,  H01H71/58 ,  H01H83/20

摘要： In one example, a hybrid circuit interrupter may include a three-coil architecture, first coil circuitry, leakage detection circuitry, and a main processing circuit including a processor. The three-coil architecture may include a coil housing, three coils, and a plurality of coil assembly conductors. The coils may be disposed within the coil housing. The coil assembly conductors may be at least partially disposed within the coil housing. The first coil circuitry may be connected to the first coil and may generate first coil signals. The leakage detection circuitry may be connected to the other two coils and may generate a leakage signal. The processor may receive the first coil signals, receive the leakage signal, determine whether an arc fault exists based on the first coil signals, determine whether a ground fault exists based on the leakage signal, and generate a first trigger signal if a fault is determined to exist.