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    Distributed processor system
    14.
    发明授权
    Distributed processor system 有权

    公开(公告)号：US11422969B2

    公开(公告)日：2022-08-23

    申请号：US16913251

    申请日：2020-06-26

    Applicant: Analog Devices, Inc.

    Inventor： Manish J. Manglani ,  Shipra Bhal ,  Christopher Mayer

    IPC: G06F9/30 ,  G06F15/82 ,  G06F13/24 ,  G06F9/38

    Abstract: This disclosure relates to a distributed processing system for configuring multiple processing channels. The distributed processing system includes a main processor, such as an ARM processor, communicatively coupled to a plurality of co-processors, such as stream processors. The co-processors can execute instructions in parallel with each other and interrupt the ARM processor. Longer latency instructions can be executed by the main processor and lower latency instructions can be executed by the co-processors. There are several ways that a stream can be triggered in the distributed processing system. In an embodiment, the distributed processing system is a stream processor system that includes an ARM processor and stream processors configured to access different register sets. The stream processors can include a main stream processor and stream processors in respective transmit and receive channels. The stream processor system can be implemented in a radio system to configure the radio for operation.

    System and method to calibrate the frequency response of an electronic filter
    15.
    发明授权
    System and method to calibrate the frequency response of an electronic filter 有权
    校准电子滤波器频率响应的系统和方法

    公开(公告)号：US08934856B2

    公开(公告)日：2015-01-13

    申请号：US13650707

    申请日：2012-10-12

    Applicant: Analog Devices, Inc.

    Inventor： David J. McLaurin ,  Christopher Mayer

    IPC: H04B1/04

    CPC classification number: H04B17/11

    Abstract: A system and method provide for calibrating the frequency response of an electronic filter. The system and method include a radio transmitter with both in-phase and quadrature baseband paths. Each baseband path includes a numerically controlled oscillator (“NCO”), a digital signal path, a digital-to-analog converter (“DAC”), and an analog filter. A low frequency tone is applied from the NCO from one of the baseband path, while a high frequency tone is applied from the NCO in the other baseband path. An analog peak detector at output determines which analog filter has the largest amplitude at the output. The peak detector offset between the two analog filters is offset by stimulating the in-phase and quadrature baseband paths with the respective NCOs to find an amplitude difference between the output signals from the NCOs that makes the output of the analog filters the same. Calibration is then performed on the corner frequency and filter peaking through respective stimulation of the in-phase and quadrature baseband paths. The system and method is advantageous as it allows for very accurate calibration of both the filter corner frequency and peaking during a standard transmission operating mode with little additional hardware required.

    Abstract translation: 一种用于校准电子滤波器的频率响应的系统和方法。 该系统和方法包括具有同相和正交基带路径的无线电发射机。 每个基带路径包括数控振荡器（“NCO”），数字信号路径，数模转换器（“DAC”）和模拟滤波器。 来自基带路径之一的NCO施加低频音调，而在另一个基带路径中从NCO施加高频音调。 输出端的模拟峰值检测器决定了哪个模拟滤波器在输出端具有最大幅度。 两个模拟滤波器之间的峰值检测器偏移通过用相应的NCO刺激同相和正交基带路径来偏移，以在来自NCO的输出信号之间找到使模拟滤波器的输出相同的振幅差。 然后在角频率上进行校准，并通过相位和正交基带路径的相应刺激来过滤峰值。 该系统和方法是有利的，因为它允许在标准传输操作模式期间非常精确地校准滤波器转角频率和峰值，同时需要少量额外的硬件。

    DATAFLOW GASKETS WITH CIRCULAR BUFFERS
    16.
    发明申请
    DATAFLOW GASKETS WITH CIRCULAR BUFFERS 有权

    公开(公告)号：US20250036842A1

    公开(公告)日：2025-01-30

    申请号：US18781029

    申请日：2024-07-23

    Applicant: Analog Devices, Inc.

    Inventor： Christopher Mayer ,  Sudhir Desai ,  Arash Azizimazreah

    IPC: G06F30/347 ,  G06F13/40 ,  H04L49/101

    Abstract: Apparatus and methods for facilitating data movement among circuit blocks are disclosed. In certain embodiments, dataflow gaskets with circular buffers are deployed in any number or arrangement to achieve efficient on-chip data movement among different circuit blocks of the die. Each dataflow gasket can be attached to a corresponding circuit block using tightly coupled memories to provide low latency and fast access to incoming and outgoing data streams. Furthermore, memory allocation and buffer management can be handled by the internal logic in the dataflow gasket to reduce or eliminate software development efforts. For example, the dataflow gasket can use circular buffers to allow the circuit block to access the dataflow gasket's memories without needing to understand the internal memory addressing of the dataflow gasket.

    LOCAL OSCILLATOR CLOCK SHAPING FOR PRE-DISTORTION
    17.
    发明公开
    LOCAL OSCILLATOR CLOCK SHAPING FOR PRE-DISTORTION 审中-公开

    公开(公告)号：US20240297622A1

    公开(公告)日：2024-09-05

    申请号：US18262553

    申请日：2022-02-22

    Applicant: Analog Devices, Inc.

    Inventor： Christopher Mayer ,  Tao Yu ,  Gregory Patrick Davis

    IPC: H03F1/32 ,  H03F3/189 ,  H03F3/24

    CPC classification number: H03F1/3247 ,  H03F3/189 ,  H03F3/24

    Abstract: Apparatus and methods for pre-distorting a radio frequency transmit signal based on local oscillator clock shaping are disclosed. In certain embodiments, one or more clock signals generated by a local oscillator and used for mixing in a transceiver are shaped to account for non-linearity of a power amplifier that amplifies the radio frequency transmit signal. Such pre-distortion can be performed in addition to or alternatively to performing digital pre-distortion on a digital representation of the radio frequency transmit signal.

    Fast control interface
    19.
    发明授权
    Fast control interface 有权

    公开(公告)号：US10530611B1

    公开(公告)日：2020-01-07

    申请号：US14260875

    申请日：2014-04-24

    Applicant: ANALOG DEVICES, INC.

    Inventor： Manish J. Manglani ,  Christopher Mayer

    IPC: H04L25/02

    Abstract: Devices exchange control signals with each other to ensure proper operation of an overall system. For instance, in a communication system, a baseband processor and a transceiver communicate with each other to exchange information for controlling the respective signal processing parts of the baseband processor and the transceiver. While Serial Peripheral Interfaces (SPIs) can be used, SPI can be extremely slow, and does not provide a protocol for allowing a complex set of control signals to be exchanged between the baseband processor and transceiver. The present disclosure describes a fast control interface which can support various modes of operation in allowing two devices to communicate with each other quickly and effectively.

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