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1.发明授权公开(公告)号：US08934856B2
公开(公告)日：2015-01-13
申请号：US13650707
申请日：2012-10-12
Applicant: Analog Devices, Inc.
Inventor： David J. McLaurin , Christopher Mayer
IPC: H04B1/04
CPC classification number: H04B17/11
Abstract: A system and method provide for calibrating the frequency response of an electronic filter. The system and method include a radio transmitter with both in-phase and quadrature baseband paths. Each baseband path includes a numerically controlled oscillator (“NCO”), a digital signal path, a digital-to-analog converter (“DAC”), and an analog filter. A low frequency tone is applied from the NCO from one of the baseband path, while a high frequency tone is applied from the NCO in the other baseband path. An analog peak detector at output determines which analog filter has the largest amplitude at the output. The peak detector offset between the two analog filters is offset by stimulating the in-phase and quadrature baseband paths with the respective NCOs to find an amplitude difference between the output signals from the NCOs that makes the output of the analog filters the same. Calibration is then performed on the corner frequency and filter peaking through respective stimulation of the in-phase and quadrature baseband paths. The system and method is advantageous as it allows for very accurate calibration of both the filter corner frequency and peaking during a standard transmission operating mode with little additional hardware required.
Abstract translation: 一种用于校准电子滤波器的频率响应的系统和方法。 该系统和方法包括具有同相和正交基带路径的无线电发射机。 每个基带路径包括数控振荡器（“NCO”），数字信号路径，数模转换器（“DAC”）和模拟滤波器。 来自基带路径之一的NCO施加低频音调，而在另一个基带路径中从NCO施加高频音调。 输出端的模拟峰值检测器决定了哪个模拟滤波器在输出端具有最大幅度。 两个模拟滤波器之间的峰值检测器偏移通过用相应的NCO刺激同相和正交基带路径来偏移，以在来自NCO的输出信号之间找到使模拟滤波器的输出相同的振幅差。 然后在角频率上进行校准，并通过相位和正交基带路径的相应刺激来过滤峰值。 该系统和方法是有利的，因为它允许在标准传输操作模式期间非常精确地校准滤波器转角频率和峰值，同时需要少量额外的硬件。
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公开(公告)号：US20180294817A1
公开(公告)日：2018-10-11
申请号：US15957766
申请日：2018-04-19
Applicant: Analog Devices, Inc.
Inventor： Christopher Mayer , David J. McLaurin , Christopher W. Angell , Sudhir Desai , Steven R. Bal
Abstract: Apparatus and methods for phase synchronization of phase-locked loops (PLLs) are provided. In certain configurations, an RF communication system includes a PLL that generates one or more output clock signals and a phase synchronization circuit that synchronizes a phase of the PLL. The phase synchronization circuit includes a sampling circuit that generates samples by sampling the one or more output clock signals based on timing of a reference clock signal. Additionally, the phase synchronization circuit includes a phase difference calculation circuit that generates a phase difference signal based on the samples and a tracking digital phase signal representing the phase of the PLL. The phase synchronization circuit further includes a phase adjustment control circuit that provides a phase adjustment to the PLL based on the phase difference signal so as to synchronize the PLL.
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公开(公告)号：US09300444B2
公开(公告)日：2016-03-29
申请号：US13951341
申请日：2013-07-25
Applicant: ANALOG DEVICES, INC
Inventor： Raju Hormis , Steven R. Bal , Kevin Glenn Gard , Jianxun Fan , David J. McLaurin , Antonio Montalvo
CPC classification number: H04L1/243 , H03F3/245 , H03F3/45475 , H03F2200/336 , H03F2203/45512 , H04B17/14 , H04B17/17 , H04B17/18 , H04B17/21 , H04L27/364 , H04L27/366
Abstract: A transmission module is provided that includes a transmitter, a loopback receiver, and a QEC controller. In a first state, the QEC controller calibrates the loopback receiver to remove quadrature imbalance in the loopback receiver. In a second state, a communication pathway is provided between the transmitter and the loopback receiver, and the QEC controller identifies quadrature imbalance in the transmitter based at least one a comparison of the data signals at the output of the loopback receiver with data signals at the input of the transmitter. Based on the comparison, the QEC controller can adjust one or more characteristics of the transmitter to correct quadrature errors in the transmitter.
Abstract translation: 提供了一种传输模块，其包括发射机，环回接收机和QEC控制器。 在第一种状态下，QEC控制器校准环回接收机以消除环回接收机中的正交不平衡。 在第二状态下，在发射机和环回接收机之间提供通信路径，并且QEC控制器基于环回接收机的输出端的数据信号与数据信号的比较， 发射机的输入。 基于比较，QEC控制器可以调整发射机的一个或多个特性来校正发射机的正交误差。
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公开(公告)号：US20150030102A1
公开(公告)日：2015-01-29
申请号：US13951341
申请日：2013-07-25
Applicant: Analog Devices, Inc.
Inventor： Raju Hormis , Steven R. Bal , Kevin Glenn Gard , Jianxun Fan , David J. McLaurin , Antonio Montalvo
CPC classification number: H04L1/243 , H03F3/245 , H03F3/45475 , H03F2200/336 , H03F2203/45512 , H04B17/14 , H04B17/17 , H04B17/18 , H04B17/21 , H04L27/364 , H04L27/366
Abstract: A transmission module is provided that includes a transmitter, a loopback receiver, and a QEC controller. In a first state, the QEC controller calibrates the loopback receiver to remove quadrature imbalance in the loopback receiver. In a second state, a communication pathway is provided between the transmitter and the loopback receiver, and the QEC controller identifies quadrature imbalance in the transmitter based at least one a comparison of the data signals at the output of the loopback receiver with data signals at the input of the transmitter. Based on the comparison, the QEC controller can adjust one or more characteristics of the transmitter to correct quadrature errors in the transmitter.
Abstract translation: 提供了一种传输模块，其包括发射机，环回接收机和QEC控制器。 在第一种状态下，QEC控制器校准环回接收机以消除环回接收机中的正交不平衡。 在第二状态下，在发射机和环回接收机之间提供通信路径，并且QEC控制器基于环回接收机的输出端的数据信号与数据信号的比较， 发射机的输入。 基于比较，QEC控制器可以调整发射机的一个或多个特性来校正发射机的正交误差。
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公开(公告)号：US11444669B2
公开(公告)日：2022-09-13
申请号：US17371509
申请日：2021-07-09
Applicant: Analog Devices, Inc.
Inventor： Antonio Montalvo , David J. McLaurin
IPC: H04B7/06
Abstract: Embodiments of the present disclosure relate to cellular technology applications of beamforming performed in the digital domain. In one aspect, an RF system for performing digital beamforming on a per-carrier basis is disclosed, where different phase and/or amplitude adjustments are applied to signals of different frequency ranges (i.e., to different carrier signals). In another aspect, an RF system for performing digital beamforming on a per-antenna basis is disclosed, where different phase and/or amplitude adjustments are applied to signals transmitted from or received by different antennas. In some embodiments, an RF system may be configured to implement both digital beamforming on a per-carrier basis and digital beamforming on a per-antenna basis. The RF systems disclosed herein allow implementing programmable beamforming in the digital domain in a manner that is significantly less complex than conventional implementations.
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Patent Agency Ranking
公开(公告)号：US11012104B2
公开(公告)日：2021-05-18
申请号：US15478926
申请日：2017-04-04
Applicant: ANALOG DEVICES, INC.
Inventor： David J. McLaurin , Christopher Mayer , Hatice Dicle Ozis Unsal , Zheng Gao
Abstract: Apparatus and methods for calibrating radio frequency transmitters to compensate for common mode local oscillator leakage are provided herein. In certain configurations herein, a transmitter generates a radio frequency transmit signal based on mixing a baseband input signal with a local oscillator signal. The transmitter is calibrated to compensate for common mode local oscillator leakage. Thus, a common mode component of the local oscillator signal is reduced or eliminated from the radio frequency transmit signal, which provides a number of benefits, including lower levels of undesired emissions from the transmitter.
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公开(公告)号：US20170324419A1
公开(公告)日：2017-11-09
申请号：US15147408
申请日：2016-05-05
Applicant: ANALOG DEVICES, INC.
Inventor： Christopher Mayer , David J. McLaurin , Christopher W. Angell , Sudhir Desai , Steven R. Bal
CPC classification number: H03L7/1976 , H03L7/087 , H03L7/0891 , H03L7/091 , H03L7/093 , H03L7/23 , H03L7/235 , H04B7/0413 , H04L7/0331
Abstract: Apparatus and methods for phase synchronization of phase-locked loops (PLLs) are provided. In certain configurations, an RF communication system includes a PLL that generates one or more output clock signals and a phase synchronization circuit that synchronizes a phase of the PLL. The phase synchronization circuit includes a sampling circuit that generates samples by sampling the one or more output clock signals based on timing of a reference clock signal. Additionally, the phase synchronization circuit includes a phase difference calculation circuit that generates a phase difference signal based on the samples and a tracking digital phase signal representing the phase of the PLL. The phase synchronization circuit further includes a phase adjustment control circuit that provides a phase adjustment to the PLL based on the phase difference signal so as to synchronize the PLL.
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公开(公告)号：US11012201B2
公开(公告)日：2021-05-18
申请号：US14340461
申请日：2014-07-24
Applicant: Analog Devices, Inc.
Inventor： Raju Hormis , Steven R. Bal , Antonio Montalvo , David J. McLaurin , Martin McCormick
Abstract: A transmission module is provided that includes a transmitter, a loopback receiver, and a QEC controller. The QEC controller identifies quadrature imbalance in the transmitter based at least one a comparison of the data signals at the output of the loopback receiver with data signals at the input of the transmitter. Based on the comparison, the QEC controller can adjust one or more characteristics of the transmitter to correct quadrature errors in the transmitter.
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公开(公告)号：US09979408B2
公开(公告)日：2018-05-22
申请号：US15147408
申请日：2016-05-05
Applicant: ANALOG DEVICES, INC.
Inventor： Christopher Mayer , David J. McLaurin , Christopher W. Angell , Sudhir Desai , Steven R. Bal
CPC classification number: H03L7/1976 , H03L7/087 , H03L7/0891 , H03L7/091 , H03L7/093 , H03L7/23 , H03L7/235 , H04B7/0413 , H04L7/0331
Abstract: Apparatus and methods for phase synchronization of phase-locked loops (PLLs) are provided. In certain configurations, an RF communication system includes a PLL that generates one or more output clock signals and a phase synchronization circuit that synchronizes a phase of the PLL. The phase synchronization circuit includes a sampling circuit that generates samples by sampling the one or more output clock signals based on timing of a reference clock signal. Additionally, the phase synchronization circuit includes a phase difference calculation circuit that generates a phase difference signal based on the samples and a tracking digital phase signal representing the phase of the PLL. The phase synchronization circuit further includes a phase adjustment control circuit that provides a phase adjustment to the PLL based on the phase difference signal so as to synchronize the PLL.
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公开(公告)号：US09614557B1
公开(公告)日：2017-04-04
申请号：US14954857
申请日：2015-11-30
Applicant: Analog Devices, Inc.
Inventor： Christopher Mayer , David J. McLaurin , Chris Angell
CPC classification number: H04B1/0475 , H04B1/40 , H04B17/13 , H04B2001/0425 , H04L1/0042
Abstract: A method and apparatus for phase adjustment of a RF transceiver is disclosed. Based on a first local oscillator signal and a second local oscillator signal, a beat signal that indicates the frequency and phase relationship between the first and second local oscillator signals can be generated. Using the beat signal, changing phase relationship between the first and second local oscillator signals can be cumulatively taken account for using phase averaging to allow quick restoration to observation of a previously observed channel.
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