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公开(公告)号:US11233010B2
公开(公告)日:2022-01-25
申请号:US16732157
申请日:2019-12-31
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan Kung , Hung-Yi Lin
IPC: H01L23/538 , H01L25/18 , H01L25/16 , H01L23/498 , H01L23/31 , H01L23/00
Abstract: An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section. The second signal transmission path is between the second surface of the sub-computing section and the at least one conductive via of the sub-computing section.
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公开(公告)号:US10472228B2
公开(公告)日:2019-11-12
申请号:US15680056
申请日:2017-08-17
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chien-Hua Chen , Cheng-Yuan Kung , Che-Hau Huang , Chin-Cheng Kuo
Abstract: A Micro Electro-Mechanical System (MEMS) device package includes a first circuit layer, a partition wall, a MEMS component, a second circuit layer and a polymeric dielectric layer. The partition wall is disposed over the first circuit layer. The MEMS component is disposed over the partition wall and electrically connected to the first circuit layer. The first circuit layer, the partition wall and the MEMS component enclose a space. The second circuit layer is disposed over and electrically connected to the first circuit layer. The polymeric dielectric layer is disposed between the first circuit layer and the second circuit layer.
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公开(公告)号:US11935841B2
公开(公告)日:2024-03-19
申请号:US17990645
申请日:2022-11-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan Kung , Hung-Yi Lin , Meng-Wei Hsieh , Yu-Pin Tsai
IPC: H01L23/552 , H01L21/50 , H01L23/31
CPC classification number: H01L23/552 , H01L21/50 , H01L23/31
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
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公开(公告)号:US11923825B2
公开(公告)日:2024-03-05
申请号:US17383264
申请日:2021-07-22
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan Kung , Meng-Wei Hsieh
CPC classification number: H03H9/0552 , H01L23/552 , H03H9/0542 , H03H9/10 , H03H9/54 , H05K3/34 , H01L24/48 , H01L24/49 , H01L2224/48105 , H01L2224/48227 , H01L2224/4903 , H01L2924/14215
Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.
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公开(公告)号:US20230326889A1
公开(公告)日:2023-10-12
申请号:US17715876
申请日:2022-04-07
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Hung-Yi Lin , Cheng-Yuan Kung
IPC: H01L23/00 , H01L25/065 , H01L23/48
CPC classification number: H01L24/08 , H01L25/0652 , H01L23/481 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2924/1434 , H01L2224/32225 , H01L2224/73204 , H01L2224/08145 , H01L2924/1433 , H01L2924/1432 , H01L2224/16225
Abstract: An electronic package is provided. The electronic package includes a processing component and a memory unit. The processing component has a side including a first region and a second region distinct from the first region. The memory unit is disposed over the first region. The first region is configured to provide interconnection between the processing component and the memory unit, and the second region is configured to provide external connection.
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公开(公告)号:US11508668B2
公开(公告)日:2022-11-22
申请号:US17111350
申请日:2020-12-03
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan Kung , Hung-Yi Lin , Meng-Wei Hsieh , Yu-Pin Tsai
IPC: H01L23/552 , H01L21/50 , H01L23/31
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
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公开(公告)号:US10475718B2
公开(公告)日:2019-11-12
申请号:US15599379
申请日:2017-05-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chien-Hua Chen , Hung-Yi Lin , Cheng-Yuan Kung , Teck-Chong Lee , Shiuan-Yu Lin
IPC: H01L23/522 , H01L23/31 , H01L23/00 , H01L23/532 , H01L21/683 , H01L23/498 , H01L25/065 , H01L25/16
Abstract: A semiconductor device package includes a dielectric layer, a first RDL, a second RDL, an inductor, a first electronic component and a second electronic component. The first RDL is adjacent to a first surface of the dielectric layer, and the first RDL includes first conductive pieces. The second RDL is adjacent to a second surface of the dielectric layer, and the second RDL includes second conductive pieces. The inductor is disposed in the dielectric layer. The inductor includes induction pillars, wherein each of the induction pillars is disposed through the dielectric layer, and each of the induction pillars is interconnected between a respective one of the first conductive pieces of the first RDL and a respective one of the second conductive pieces of the second RDL. The first electronic component and the second electronic component are between the first RDL and the second RDL, and electrically connected to each other through the inductor.
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公开(公告)号:US10211137B2
公开(公告)日:2019-02-19
申请号:US15618085
申请日:2017-06-08
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chien-Hua Chen , Sheng-Chi Hsieh , Cheng-Yuan Kung
IPC: H01L23/04 , H01L23/498 , H05K1/16 , H01L21/48 , H01L23/538
Abstract: A method for manufacturing a semiconductor device package includes providing a substrate having a first surface and a second surface opposite to the first surface; disposing a passive component layer on the first surface of the substrate; after disposing the passive component layer, forming at least one via in the substrate, wherein the via penetrates the substrate and the passive component layer; and disposing a conductive layer on the passive component layer and filling the via with the conductive layer.
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公开(公告)号:US11756896B2
公开(公告)日:2023-09-12
申请号:US17111347
申请日:2020-12-03
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan Kung , Meng-Wei Hsieh
IPC: H01L23/552 , H01L21/56 , H01L23/538 , H01L23/00
CPC classification number: H01L23/552 , H01L21/56 , H01L23/5389 , H01L24/32 , H01L2224/32227
Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes an electronic component, a conductive contact, and a first shielding layer. The electronic component has a first surface, a lateral surface angled with the first surface, and a second surface opposite to the first surface. The conductive contact is connected to the first surface of the electronic component. The first shielding layer is disposed on the lateral surface of the electronic component and a portion of the first surface of the electronic component. The first shielding layer contacts the conductive contact.
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公开(公告)号:US11722220B2
公开(公告)日:2023-08-08
申请号:US17144938
申请日:2021-01-08
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chang-Yu Lin , Cheng-Yuan Kung , Hung-Yi Lin
CPC classification number: H04B10/40 , G02B6/4206 , G02B6/4257
Abstract: A system including optical devices is provided. The system includes a first substrate and a first device for optical communication. The first device has a first surface, a second surface opposite to the first surface, and a first side contiguous with the first surface and the second surface. Moreover, the first side is smaller than one of the first surface and the second surface in terms of area. The first device is attached at the first side thereof to the first substrate.
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