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    SENSING DEVICE FOR MEASURING A LEVEL OF AN ANALYTE, METHOD OF FABRICATION THEREOF
    12.
    发明申请
    SENSING DEVICE FOR MEASURING A LEVEL OF AN ANALYTE, METHOD OF FABRICATION THEREOF 审中-公开

    公开(公告)号：US20180149608A1

    公开(公告)日：2018-05-31

    申请号：US15577266

    申请日：2016-05-30

    Applicant: Agency for Science, Technology and Research

    Inventor： Kok Leong Chang ,  Zi En Ooi ,  Jie Zhang

    IPC: G01N27/12 ,  G01N27/416

    CPC classification number: G01N27/122 ,  G01N27/12 ,  G01N27/4167

    Abstract: There is provided a sensing device for measuring a level of an analyte. The sensing device includes a sensing element configured to sense the analyte and produce an electrical output which is variable based on the level of the analyte sensed, a measurement circuit including a reference element for providing an electrical property, the measurement circuit being connected to the sensing element and configured to provide a measurement output signal based on the electrical property of the reference element and the electrical output of the sensing element, whereby the measurement output signal indicates the level of the analyte sensed with respect to the electrical property of the reference element. There is also provided a corresponding method of fabricating the sensing device.

    ORGANIC INVERTER AND METHOD OF FORMING THE SAME
    14.
    发明申请
    ORGANIC INVERTER AND METHOD OF FORMING THE SAME 审中-公开

    公开(公告)号：US20170345871A1

    公开(公告)日：2017-11-30

    申请号：US15607877

    申请日：2017-05-30

    Applicant: Agency for Science, Technology and Research

    Inventor： Aung Ko Ko Kyaw ,  Jie Zhang ,  Changyun Jiang

    IPC: H01L27/28 ,  H01L51/00 ,  H01L51/05

    CPC classification number: H01L27/283 ,  H01L51/0012 ,  H01L51/0096 ,  H01L51/0558

    Abstract: Various embodiments provide a method of forming an organic inverter including a first transistor and a second transistor. The method may include providing a substrate with a dielectric layer formed on top of the substrate; depositing a first semiconductor polymer layer on a first region of the dielectric layer; forming a first electrode and a second electrode on the first semiconductor polymer layer, thereby forming the first transistor located at the first region of the dielectric layer; forming a plurality of grooves on a surface of a second region of the dielectric layer; depositing a second semiconductor polymer layer on the second region of the dielectric layer; and forming a first electrode and a second electrode on the second semiconductor polymer layer, thereby forming the second transistor located at the second region of the dielectric layer.

    PRINTED CIRCUIT ARRANGEMENT AND METHOD OF FORMING THE SAME
    18.
    发明申请
    PRINTED CIRCUIT ARRANGEMENT AND METHOD OF FORMING THE SAME 有权
    印刷电路布置及其形成方法

    公开(公告)号：US20150016048A1

    公开(公告)日：2015-01-15

    申请号：US14329913

    申请日：2014-07-12

    Applicant: Agency for Science, Technology and Research

    Inventor： Kok Leong Chang ,  Jie Zhang ,  Weng Yew Lee

    IPC: H05K1/14 ,  H05K3/12 ,  H05K3/36

    CPC classification number: H03K5/05 ,  H05K1/0248 ,  H05K1/0393 ,  H05K1/095 ,  H05K1/16 ,  Y10T29/49126

    Abstract: In various embodiments, a printed circuit arrangement may be provided. The printed circuit arrangement may include a processor circuit. The printed circuit arrangement may further include a printed main circuit arrangement in electrical connection with a first input node of the processor circuit. The printed main circuit arrangement may be configured to receive at least one input signal and generate a main circuit signal based on the at least one input signal after a first delay from receiving the at least one input signal. The printed circuit arrangement may further include a printed reference circuit arrangement in electrical connection with a second input node of the processor circuit. The printed reference circuit arrangement may be configured to receive a further input signal, may have a second delay and may be configured such that the second delay adapts to the first delay.

    Abstract translation: 在各种实施例中，可以提供印刷电路装置。 印刷电路装置可以包括处理器电路。 印刷电路装置还可以包括与处理器电路的第一输入节点电连接的印刷主电路装置。 打印的主电路装置可以被配置为在接收到至少一个输入信号之后的第一延迟之后基于至少一个输入信号接收至少一个输入信号并产生主电路信号。 印刷电路装置还可以包括与处理器电路的第二输入节点电连接的印刷参考电路装置。 印刷的参考电路装置可以被配置为接收另外的输入信号，可以具有第二延迟并且可以被配置为使得第二延迟适应于第一延迟。

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