公开(公告)号：US20160336744A1

公开(公告)日：2016-11-17

申请号：US14797675

申请日：2015-07-13

Applicant: ANALOG DEVICES, INC.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo ,  Rodrigo Carrillo-Ramirez

IPC: H02H9/04

CPC classification number: H02H9/046 ,  H01L27/0248 ,  H01L27/0266 ,  H02H9/04

Abstract: Apparatus and methods for electrostatic discharge (ESD) protection of radio frequency circuits are provided. In certain configurations, an ESD protection circuit includes two or more pairs of field effect transistors (FETs) electrically connected in series between a radio frequency signal pin and a radio frequency ground pin. Each of the two or more pairs of FETs includes a negative ESD protection FET for providing protection from negative polarity ESD events and a positive ESD protection FET for providing protection from positive polarity ESD events. The source and gate of the negative ESD protection FET are electrically connected to one another, and the source and gate of the positive ESD protection FET are electrically connected to one another. Additionally, the drains of the negative and positive ESD protection FETs are electrically connected to one another. The ESD protection circuit exhibits a relatively low capacitance and flat capacitance versus voltage characteristic.

Abstract translation: 提供射频电路的静电放电（ESD）保护装置和方法。 在某些配置中，ESD保护电路包括串联电连接在射频信号引脚和射频接地引脚之间的两对或更多对场效应晶体管（FET）。 两对或更多对FET中的每一个包括用于提供对负极性ESD事件的保护的负ESD保护FET和用于提供对正极性ESD事件的保护的正ESD保护FET。 负ESD保护FET的源极和栅极彼此电连接，并且正ESD保护FET的源极和栅极彼此电连接。 此外，负极和正极ESD保护FET的漏极彼此电连接。 ESD保护电路具有相对低的电容和平坦的电容对电压特性。

公开(公告)号：US20160300830A1

公开(公告)日：2016-10-13

申请号：US14796731

申请日：2015-07-10

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Jonathan Pfeifer

IPC: H01L27/02

CPC classification number: H01L27/0259 ,  H01L27/0207 ,  H01L27/0262

Abstract: The disclosed technology relates to electronics, and more particularly, to protection devices that protect circuits from transient electrical events such as electrical overstress/electrostatic discharge. A protection device includes a semiconductor substrate having formed therein at least two wells and a deep well underlying and contacting the at least two wells. The device additionally includes a first PN diode formed in one of the at least two wells and having a first heavily doped region of a first conductivity type and a first heavily doped region of a second conductivity type, and includes a second PN diode formed in one of the at least two wells and having a second heavily doped region of the first conductivity type and a second heavily doped region of the second conductivity type. The device additionally includes a first PN diode and the second PN diode are electrically shorted by an electrical shorting structure to form a first plurality of serially connected diodes having a threshold voltage. The device further includes a PNPN silicon-controlled rectifier (SCR) having a trigger voltage and comprising the first heavily doped region of the first conductivity type, the at least two wells, the deep well, and the second heavily doped region of the second conductivity type.

Abstract translation: 所公开的技术涉及电子器件，更具体地，涉及保护电路免受例如电过载/静电放电等瞬态电气事件的保护装置。 保护装置包括其中形成有至少两个阱和深阱的半导体衬底，并且与至少两个阱接触。 该器件还包括形成在所述至少两个阱中的一个中并且具有第一导电类型的第一重掺杂区域和第二导电类型的第一重掺杂区域的第一PN二极管，并且包括形成在第一导电类型中的第二PN二极管 并且具有第一导电类型的第二重掺杂区域和第二导电类型的第二重掺杂区域。 该器件还包括第一PN二极管，并且第二PN二极管由电短路结构电短路以形成具有阈值电压的第一多个串联连接的二极管。 该装置还包括具有触发电压并包括第一导电类型的第一重掺杂区域，第二导电类型的至少两个阱，深阱和第二重掺杂区域的PNPN可硅可控整流器 类型。

公开(公告)号：US09275991B2

公开(公告)日：2016-03-01

申请号：US13766541

申请日：2013-02-13

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Juan Luo

IPC: H01L29/66 ,  H01L23/62 ,  H01L27/02 ,  H01L27/06 ,  H01L27/092

CPC classification number: H01L27/067 ,  H01L27/0262 ,  H01L27/0921

Abstract: An apparatus for transceiver signal isolation and voltage clamp from transient electrical events includes a bi-directional protection device comprising a bipolar PNPNP device assembly, a first parasitic PNPN device assembly, and a second parasitic PNPN device assembly. The bipolar PNPNP device assembly includes an NPN bi-directional bipolar transistor, a first PNP bipolar transistor, and a second PNP bipolar transistor, and is configured to receive a transient voltage signal through first and second pads. The first and second pads are electrically connected to the PNPNP device assembly through emitters of the first and second PNP bipolar transistors. The bipolar PNPNP device assembly is electrically connected to a first parasitic PNPN device assembly comprising a parasitic PNP bipolar transistor and a first parasitic NPN bipolar transistor. The bipolar PNPNP device assembly is further connected to a second parasitic parasitic PNPN device assembly comprising the parasitic PNP bipolar transistor and a second parasitic NPN bipolar transistor. The base of the parasitic PNP bipolar transistor is connected to the substrate of the transceiver through a resistor to prevent triggering and breakdown of the first and second parasitic PNPN device assemblies.

Abstract translation: 一种用于来自瞬态电气事件的收发信机隔离和电压钳位的装置包括双向保护装置，其包括双极性PNPNP器件组件，第一寄生PNPN器件组件和第二寄生PNPN器件组件。 双极PNPNP器件组件包括NPN双向双极晶体管，第一PNP双极晶体管和第二PNP双极晶体管，并且被配置为通过第一和第二焊盘接收瞬态电压信号。 第一和第二焊盘通过第一和第二PNP双极晶体管的发射极电连接到PNPNP器件组件。 双极PNPNP器件组件电连接到包括寄生PNP双极晶体管和第一寄生NPN双极晶体管的第一寄生PNPN器件组件。 双极PNPNP器件组件还连接到包括寄生PNP双极晶体管和第二寄生NPN双极晶体管的第二寄生寄生PNPN器件组件。 寄生PNP双极晶体管的基极通过电阻连接到收发器的基板，以防止第一和第二寄生PNPN器件组件的触发和击穿。

公开(公告)号：US20160020603A1

公开(公告)日：2016-01-21

申请号：US14335665

申请日：2014-07-18

Applicant: Analog Devices, Inc.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo ,  Sandro Herrera

IPC: H02H9/00 ,  H01L27/02 ,  H02H9/02

CPC classification number: H02H9/005 ,  H01L27/0285 ,  H02H9/046

Abstract: Apparatus and methods for providing transient overstress protection with active feedback are disclosed. In certain configurations, a protection circuit includes a transient detection circuit, a bias circuit, a clamp circuit, and a sense feedback circuit that generates a positive feedback current when the clamp circuit is clamping. The transient detection circuit can detect a presence of a transient overstress event, and can generate a detection current in response to detection of the transient overstress event. The detection current and the positive feedback current can be combined to generate a combined current, and the bias circuit can turn on the clamp circuit in response to the combined current. While the transient overstress event is present and the clamp circuit is clamping, the sense feedback circuit can generate the positive feedback current to maintain the clamp circuit turned on for the event's duration.

Abstract translation: 公开了用于提供具有主动反馈的瞬态过应力保护的装置和方法。 在某些配置中，保护电路包括瞬态检测电路，偏置电路，钳位电路和在钳位电路钳位时产生正反馈电流的感测反馈电路。 瞬变检测电路可以检测到瞬态过应力事件的存在，并且可以响应于瞬态过应力事件的检测而产生检测电流。 可以组合检测电流和正反馈电流以产生组合电流，并且偏置电路可以响应于组合电流而导通钳位电路。 当存在瞬态过应力事件并且钳位电路被钳位时，感测反馈电路可以产生正反馈电流，以维持钳位电路在事件持续时间内导通。

公开(公告)号：US09123540B2

公开(公告)日：2015-09-01

申请号：US14068566

申请日：2013-10-31

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Srivatsan Parthasarathy

IPC: H01L29/72 ,  H01L27/02

CPC classification number: H01L27/0262 ,  H01L29/7436

Abstract: Signal IO protection devices referenced to a single supply are provided herein. In certain implementations, a protection device includes a first silicon controlled rectifier (SCR) and a first diode for providing protection between a signal node and a power supply network, such as a power low supply network or a power high supply network. The SCR and diode structures are integrated in a common circuit layout, such that certain wells and active regions are shared between structures. In other implementations, a protection device includes first and second SCRs for providing protection between the signal node and the power low supply network or between the signal node and the power high supply network, and the SCR structures are integrated in a common circuit layout. The protection devices are suitable for single cell data conversion interface protection to a single supply in sub 3V operation.

Abstract translation: 本文提供了参考单电源的信号IO保护装置。 在某些实施方式中，保护装置包括第一可控硅整流器（SCR）和第一二极管，用于在信号节点和电源网络之间提供保护，诸如电源低供电网络或电源高供电网络。 SCR和二极管结构集成在公共电路布局中，使得某些阱和有源区域在结构之间共享。 在其他实施方式中，保护装置包括第一和第二SCR，用于在信号节点和功率低供电网络之间或在信号节点和电力高供电网络之间提供保护，并且SCR结构集成在公共电路布局中。 保护装置适用于单电池数据转换接口保护，在3V以下的单电源供电。

公开(公告)号：US09006781B2

公开(公告)日：2015-04-14

申请号：US14068869

申请日：2013-10-31

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Srivatsan Parthasarathy

IPC: H01L27/02 ,  H01L21/8249

CPC classification number: H01L27/0262 ,  H01L27/0255

Abstract: Apparatus and methods for monolithic data conversion interface protection are provided herein. In certain implementations, a protection device includes a first silicon controlled rectifier (SCR) and a first diode for providing protection between a signal node and a power high supply node, a second SCR and a second diode for providing protection between the signal node and a power low supply node, and a third SCR and a third diode for providing protection between the power high supply node and the power low supply node. The SCR and diode structures are integrated in a common circuit layout, such that certain wells and active regions are shared between structures. Configuring the protection device in this manner enables in-suit input/output interface protection using a single cell. The protection device is suitable for monolithic data conversion interface protection in sub 3V operation.

Abstract translation: 本文提供了单片数据转换接口保护的装置和方法。 在某些实施方式中，保护装置包括第一可控硅整流器（SCR）和用于在信号节点和功率高电源节点之间提供保护的第一二极管，第二SCR和第二二极管，用于在信号节点和 电源低电源节点，以及用于在电源高供电节点和电源低电源节点之间提供保护的第三SCR和第三二极管。 SCR和二极管结构集成在公共电路布局中，使得某些阱和有源区域在结构之间共享。 以这种方式配置保护设备可以使用单个单元进行适合的输入/输出接口保护。 该保护装置适用于3V以下的单片数据转换接口保护。

公开(公告)号：US20150076557A1

公开(公告)日：2015-03-19

申请号：US14068566

申请日：2013-10-31

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Srivatsan Parthasarathy

IPC: H01L27/02

CPC classification number: H01L27/0262 ,  H01L29/7436

Abstract: Signal IO protection devices referenced to a single supply are provided herein. In certain implementations, a protection device includes a first silicon controlled rectifier (SCR) and a first diode for providing protection between a signal node and a power supply network, such as a power low supply network or a power high supply network. The SCR and diode structures are integrated in a common circuit layout, such that certain wells and active regions are shared between structures. In other implementations, a protection device includes first and second SCRs for providing protection between the signal node and the power low supply network or between the signal node and the power high supply network, and the SCR structures are integrated in a common circuit layout. The protection devices are suitable for single cell data conversion interface protection to a single supply in sub 3V operation.

Abstract translation: 本文提供了参考单电源的信号IO保护装置。 在某些实施方式中，保护装置包括第一可控硅整流器（SCR）和第一二极管，用于在信号节点和电源网络之间提供保护，诸如电源低供电网络或电源高供电网络。 SCR和二极管结构集成在公共电路布局中，使得某些阱和有源区域在结构之间共享。 在其他实施方式中，保护装置包括第一和第二SCR，用于在信号节点和功率低供电网络之间或在信号节点和电力高供电网络之间提供保护，并且SCR结构集成在公共电路布局中。 保护装置适用于单电池数据转换接口保护，在3V以下的单电源供电。

公开(公告)号：US20140225228A1

公开(公告)日：2014-08-14

申请号：US13766541

申请日：2013-02-13

Applicant: ANALOG DEVICES, INC.

Inventor： Javier Alejandro Salcedo ,  Juan Luo

IPC: H01L27/06

CPC classification number: H01L27/067 ,  H01L27/0262 ,  H01L27/0921

Abstract: An apparatus for transceiver signal isolation and voltage clamp from transient electrical events includes a bi-directional protection device comprising a bipolar PNPNP device assembly, a first parasitic PNPN device assembly, and a second parasitic PNPN device assembly. The bipolar PNPNP device assembly includes an NPN bi-directional bipolar transistor, a first PNP bipolar transistor, and a second PNP bipolar transistor, and is configured to receive a transient voltage signal through first and second pads. The first and second pads are electrically connected to the PNPNP device assembly through emitters of the first and second PNP bipolar transistors. The bipolar PNPNP device assembly is electrically connected to a first parasitic PNPN device assembly comprising a parasitic PNP bipolar transistor and a first parasitic NPN bipolar transistor. The bipolar PNPNP device assembly is further connected to a second parasitic parasitic PNPN device assembly comprising the parasitic PNP bipolar transistor and a second parasitic NPN bipolar transistor. The base of the parasitic PNP bipolar transistor is connected to the substrate of the transceiver through a resistor to prevent triggering and breakdown of the first and second parasitic PNPN device assemblies.

Abstract translation: 一种用于来自瞬态电气事件的收发信机隔离和电压钳位的装置包括双向保护装置，其包括双极性PNPNP器件组件，第一寄生PNPN器件组件和第二寄生PNPN器件组件。 双极PNPNP器件组件包括NPN双向双极晶体管，第一PNP双极晶体管和第二PNP双极晶体管，并且被配置为通过第一和第二焊盘接收瞬态电压信号。 第一和第二焊盘通过第一和第二PNP双极晶体管的发射极电连接到PNPNP器件组件。 双极PNPNP器件组件电连接到包括寄生PNP双极晶体管和第一寄生NPN双极晶体管的第一寄生PNPN器件组件。 双极PNPNP器件组件还连接到包括寄生PNP双极晶体管和第二寄生NPN双极晶体管的第二寄生寄生PNPN器件组件。 寄生PNP双极晶体管的基极通过电阻连接到收发器的基板，以防止第一和第二寄生PNPN器件组件的触发和击穿。

公开(公告)号：US20140167104A1

公开(公告)日：2014-06-19

申请号：US13754200

申请日：2013-01-30

Applicant: ANALOG DEVICES, INC.

Inventor： Javier Alejandro Salcedo

IPC: H01L27/06 ,  H01L29/66

CPC classification number: H01L29/66378 ,  H01L27/0255 ,  H01L27/0262 ,  H01L27/092 ,  H01L29/0692 ,  H01L29/735 ,  H01L29/78 ,  H01L29/861

Abstract: Protection circuit architectures with integrated supply clamps and methods of forming the same are provided herein. In certain implementation, an integrated circuit interface protection device includes a first diode protection structure and a first thyristor protection structure electrically connected in parallel between a signal pin a power high supply. Additionally, the protection device includes a second diode protection structure and a second thyristor protection structure electrically connected in parallel between the signal pin and a power low supply. Furthermore, the protection device includes a third diode protection structure and a third thyristor protection structure electrically connected in parallel between the power high supply and the power low supply. The third thyristor protection structure and the third diode protection structure are synthesized as part of the integrated circuit interface and can share at least a portion of the wells and/or diffusion regions associated with the first and second thyristor protection structures.

Abstract translation: 具有集成电源钳位的保护电路架构及其形成方法在此提供。 在一些实施方式中，集成电路接口保护装置包括第一二极管保护结构和在信号引脚和电源高电源之间并联电连接的第一晶闸管保护结构。 此外，保护装置包括第二二极管保护结构和在信号引脚和电源低电源之间并联电连接的第二晶闸管保护结构。 此外，保护装置包括在电源高电源和电源低电源之间并联电连接的第三二极管保护结构和第三晶闸管保护结构。 第三晶闸管保护结构和第三二极管保护结构被合成为集成电路接口的一部分，并且可以共享与第一和第二晶闸管保护结构相关联的阱和/或扩散区域的至少一部分。

公开(公告)号：US11569658B2

公开(公告)日：2023-01-31

申请号：US16946917

申请日：2020-07-10

Applicant: Analog Devices, Inc.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo ,  James Zhao

IPC: H02H9/04 ,  H01L27/02 ,  H02H9/00

Abstract: High voltage clamps with transient activation and activation release control are provided herein. In certain configurations, an integrated circuit (IC) includes a clamp electrically connected between a first node and a second node and having a control input. The IC further includes a first resistor-capacitor (RC) circuit that activates a detection signal in response to detecting a transient overstress event between the first node and the second node, an active feedback circuit that provides feedback from the first node to the control input of the clamp in response to activation of the detection signal, a second RC circuit that activates a shutdown signal after detecting passage of the transient overstress event based on low pass filtering a voltage difference between the first node and the second node, and a clamp shutdown circuit that turns off the clamp via the control input in response to activation of the shutdown signal.