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公开(公告)号：US20170276514A1
公开(公告)日：2017-09-28
申请号：US15466611
申请日：2017-03-22
Applicant: Analog Devices Global
Inventor： Jochen Schmitt , Jan Kubik
IPC: G01D5/16
CPC classification number: G01R33/091 , G01D5/145 , G01D5/16 , G01D5/24438
Abstract: Apparatus and methods provide sensing of quadrants, angles, or distance using magnetoresistive elements. A quadrant or angle sensor can have magnetoresistive elements split into multiple angles to generate an output with reduced harmonics. A distance sensor can have magnetoresistive elements split and spaced apart to generate an output with reduced harmonics. A biasing conductor can alternatingly carry different amounts of current (different in at least one of magnitude or direction) for DC offset compensation or cancellation.
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12.发明申请公开(公告)号：US20170131368A1
公开(公告)日：2017-05-11
申请号：US15000006
申请日：2016-01-18
Applicant: Analog Devices Global
Inventor： Jan Kubik , Seamus P. Whiston , Padraig Michael Doran
IPC: G01R33/09
CPC classification number: G01R33/09 , G01R33/096
Abstract: Thin film resistive sensors typically include a number of resistive components. These components should be well matched in order for the sensor to provide accurate readings. When a sensor is incorporated within an integrated circuit, the resistive components may be formed over, or under, metallic traces that form part of other components. As a result, the thin film resistive components are subjected to different levels of stress. This disclosure provides a structure that is arranged to mitigate the effects of stress.
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13.发明授权Magnetic core for use in an integrated circuit, an integrated circuit including such a magnetic core, a transformer and an inductor fabricated as part of an integrated circuit 有权用于集成电路的磁芯，包括这种磁芯的集成电路，变压器和作为集成电路的一部分制造的电感器公开(公告)号：US09484136B2
公开(公告)日：2016-11-01
申请号：US13927459
申请日：2013-06-26
Applicant: ANALOG DEVICES GLOBAL
Inventor： Michael Noel Morrissey , Jan Kubik , Shane Patrick Geary , Patrick Martin McGuinness , Catriona Marie O'Sullivan
CPC classification number: H01F3/00 , H01F27/24 , H01F27/245 , H01F27/2804 , H01F2027/2809 , H01L43/02 , H01L43/12
Abstract: A magnetic core is provided for an integrated circuit, the magnetic core comprising: a plurality of layers of magnetically functional material; a plurality of layers of a first insulating material; and at least one layer of an secondary insulating material; wherein layers of the first insulating material are interposed between layers of the magnetically functional material to form subsections of the magnetic core, and the at least one layer of second insulating material is interposed between adjacent subsections.
Abstract translation: 为集成电路提供磁芯，该磁芯包括：多层磁性功能材料; 多层第一绝缘材料; 和至少一层次级绝缘材料; 其中所述第一绝缘材料的层插入在所述磁性功能材料的层之间以形成所述磁芯的子部分，并且所述至少一层第二绝缘材料插入在相邻的子部分之间。
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Patent Agency Ranking
公开(公告)号：US20200328114A1
公开(公告)日：2020-10-15
申请号：US16914900
申请日：2020-06-29
Applicant: Analog Devices Global Unlimited Company
Inventor： Jan Kubik , Bernard P. Stenson , Michael Noel Morrissey
IPC: H01L21/768 , H01L49/02 , H01L23/522 , H01L21/288 , H01L21/033 , C23C18/16 , H01L23/532 , C25D5/02 , C25D7/12 , C25D5/10 , H05K3/24 , H05K3/18 , H05K3/42
Abstract: The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.
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公开(公告)号：US10699948B2
公开(公告)日：2020-06-30
申请号：US15810836
申请日：2017-11-13
Applicant: Analog Devices Global Unlimited Company
Inventor： Jan Kubik , Bernard P. Stenson , Michael Noel Morrissey
IPC: H01L21/768 , H01L23/522 , H01L21/288 , H01L21/033 , C23C18/16 , H01L23/532 , H01L49/02 , C25D5/02 , C25D7/12 , C25D5/10 , H05K3/24 , H05K3/18 , H05K3/42 , H05K1/02
Abstract: The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.
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公开(公告)号：US10429456B2
公开(公告)日：2019-10-01
申请号：US16189854
申请日：2018-11-13
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , Robert Guyol , Maria Jose Martinez , Jan Kubik , Padraig L. Fitzgerald , Javier Calpe Maravilla , Michael P. Lynch , Eoin E. English
Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
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公开(公告)号：US20190178953A1
公开(公告)日：2019-06-13
申请号：US16189854
申请日：2018-11-13
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , Robert Guyol , Maria Jose Martinez , Jan Kubik , Padraig L. Fitzgerald , Javier Calpe Maravilla , Michael P. Lynch , Eoin E. English
CPC classification number: G01R33/09 , B81B3/00 , B81B3/0091 , H01F17/0006 , H01F17/0033 , H01F2017/0066 , H01L43/08
Abstract: A magnetic device may include a magnetic structure, a device structure, and an associated circuit. The magnetic structure may include a patterned layer of material having a predetermined magnetic property. The patterned layer may be configured to, e.g., provide a magnetic field, sense a magnetic field, channel or concentrate magnetic flux, shield a component from a magnetic field, or provide magnetically actuated motion, etc. The device structure may be another structure of the device that is physically connected to or arranged relative to the magnetic structure to, e.g., structurally support, enable operation of, or otherwise incorporate the magnetic structure into the magnetic device, etc. The associated circuit may be electrically connected to the magnetic structure to receive, provide, condition or process of signals of the magnetic device.
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公开(公告)号：US20170276740A1
公开(公告)日：2017-09-28
申请号：US15466578
申请日：2017-03-22
Applicant: Analog Devices Global
Inventor： Jochen Schmitt , Jan Kubik
CPC classification number: G01R33/091 , G01D5/145 , G01D5/16 , G01D5/24438
Abstract: Apparatus and methods provide sensing of quadrants, angles, or distance using magnetoresistive elements. A quadrant or angle sensor can have magnetoresistive elements split into multiple angles to generate an output with reduced harmonics. A distance sensor can have magnetoresistive elements split and spaced apart to generate an output with reduced harmonics. A biasing conductor can alternatingly carry different amounts of current (different in at least one of magnitude or direction) for DC offset compensation or cancellation.
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