公开(公告)号：US20210225280A1

公开(公告)日：2021-07-22

申请号：US16632169

申请日：2019-05-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Dong LI ,  Hongwei TIAN ,  Xiaolong LI ,  Shuai ZHANG ,  Chunyang WANG

IPC: G09G3/3233 ,  H01L27/32 ,  H01L51/00 ,  H01L51/56

Abstract: A display panel is disclosed. The display panel includes a flexible substrate; a display sub-region on the flexible substrate including a light emitting device; a peripheral region of the display sub-region spacing the display sub-region from an adjacent display sub-region; and a current compensator in the peripheral region for compensating a current flowing through the light emitting device of the display sub-region in response to deformation of the flexible substrate.

公开(公告)号：US20200227586A1

公开(公告)日：2020-07-16

申请号：US16712075

申请日：2019-12-12

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pinfan WANG ,  Shantao CHEN ,  Shuai ZHANG ,  Ming LIU ,  Qiuhua MENG

IPC: H01L33/00 ,  G06F1/16 ,  H01L25/075

Abstract: The present disclosure provides a flexible display substrate, a method for manufacturing the same, and a flexible display device, and belongs to the technical field of display. Among them, the method for manufacturing a flexible display substrate includes: providing a carrier substrate; forming a flexible display substrate including a plurality of pre-cuts on the carrier substrate, with the plurality of pre-cuts exposing the carrier substrate; forming an inverted frustum structure on the carrier substrate at the plurality of pre-cuts, an orthogonal projection of a lower end surface of the inverted frustum structure on the carrier substrate is located within an orthogonal projection of an upper end surface of the inverted frustum structure on the carrier substrate; packaging the flexible display substrate; and peeling the flexible display substrate packaged from the carrier substrate.

公开(公告)号：US20190189639A1

公开(公告)日：2019-06-20

申请号：US16051947

申请日：2018-08-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yueping ZUO ,  Hongwei TIAN ,  Shuai ZHANG

IPC: H01L27/12 ,  H01L21/027

Abstract: A substrate and a manufacturing method thereof and a display device are provided. The substrate includes: a base including a bendable region; an interlayer on the base and in the bendable region; and a signal line at a side, facing away from the base, of the interlayer. In the bendable region, an orthographic projection of the signal line on the base is within an orthographic projection of the interlayer on the base; and in the bendable region, the interlayer is provided with a groove on at least one side of a portion, corresponding to the signal line, of the interlayer.

公开(公告)号：US20170365623A1

公开(公告)日：2017-12-21

申请号：US15540112

申请日：2016-11-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuai ZHANG ,  Yucheng CHAN

IPC: H01L27/12 ,  H01L29/423 ,  H01L29/51 ,  H01L21/02 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L27/1222 ,  H01L21/02112 ,  H01L21/02282 ,  H01L21/02318 ,  H01L27/1218 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/6675 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78603 ,  H01L29/78675 ,  H01L29/78678

Abstract: Disclosed are a low-temperature polycrystalline silicon thin film transistor (LTPS TFT), a method for fabricating the same, an array substrate, a display panel, and a display device. The LTPS TFT includes an active layer, a source, a drain, a gate, and a gate insulating layer which are arranged on a substrate. The gate insulating layer is arranged between the active layer and the gate, and a graphene oxide layer which is arranged between the active layer and the gate insulating layer. Since the graphene oxide layer is arranged between the active layer and the gate insulating layer, the interface between the active layer and the gate insulating layer of polycrystalline (P-Si) has a reduced roughness and interfacial defect density, and a pre-cleaning process is not necessary for the gate insulating layer.

公开(公告)号：US20170236705A1

公开(公告)日：2017-08-17

申请号：US15518642

申请日：2016-01-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Dong LI ,  Xiaoyong LU ,  Xiaolong LI ,  Zheng LIU ,  Shuai ZHANG ,  Yucheng CHAN ,  Chienhung LIU ,  Chunping LONG

IPC: H01L21/02 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L21/0268 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L27/1222 ,  H01L27/1285 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78675 ,  H01L29/78696

Abstract: The present application provides a low temperature poly-silicon thin film, a low temperature poly-silicon thin film transistor and manufacturing methods thereof, and a display device. The manufacturing method of a low temperature poly-silicon thin film comprises steps of: forming an amorphous silicon thin film on a base; and performing a laser annealing process on the amorphous silicon thin film by using a mask plate to form a low temperature poly-silicon thin film, wherein the mask plate includes a transmissive region and a shielding region surrounding the transmissive region, and two sides of the shielding region adjacent to the transmissive region are in concave-convex shapes. Performance of the low temperature poly-silicon thin film formed by the manufacturing method of a low temperature poly-silicon thin film in the present application is enhanced.

公开(公告)号：US20160300858A1

公开(公告)日：2016-10-13

申请号：US15083646

申请日：2016-03-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaoyong LU ,  Dong LI ,  Zheng LIU ,  Shuai ZHANG ,  Liang SUN ,  Chunping LONG

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L21/26586 ,  H01L29/66492 ,  H01L29/66537 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

Abstract: The embodiments of the present disclosure provide a polysilicon thin film transistor and manufacturing method thereof, an array substrate, and a display panel. The method for manufacturing a polysilicon thin film transistor comprises: forming, on a substrate, a gate, a source and a drain, and an active layer. Forming the active layer comprises: forming a polysilicon layer on the substrate, which comprises a channel region and extension regions; performing ion injection process in the extension regions to form lightly-doped regions close to the channel region and a source region and a drain region; prior to or following the formation of the lightly-doped regions, employing halo ion injection process to form halo regions at the positions of the channel region which are close to the lightly-doped regions.

Abstract translation: 本公开的实施例提供一种多晶硅薄膜晶体管及其制造方法，阵列基板和显示面板。 制造多晶硅薄膜晶体管的方法包括：在衬底上形成栅极，源极和漏极以及有源层。 形成有源层包括：在衬底上形成多晶硅层，其包括沟道区域和延伸区域; 在所述延伸区域中进行离子注入处理，以形成靠近所述沟道区域和源极区域和漏极区域的轻掺杂区域; 在形成轻掺杂区之前或之后，采用光晕离子注入工艺在靠近轻掺杂区的沟道区的位置形成卤素区。