Abstract:
An array substrate, a manufacturing method thereof and a display device are disclosed. Patterns comprising a gate, a gate insulating layer and a polysilicon active layer are formed on a base substrate by single patterning process. A passivation layer is formed on the substrate surface formed with the patterns, and patterns of a first via and a second via are formed on a surface of the passivation layer by single patterning process. Patterns of a source, a drain and a pixel electrode are formed on the substrate surface formed with the patterns by single patterning process. The source is electrically connected with the polysilicon active layer through the first via, and the drain is electrically connected with the polysilicon active layer through the second via. A pattern of pixel defining layer is formed on the substrate surface formed with the patterns by single patterning process.
Abstract:
A thin film transistor, an array substrate, and a manufacturing method thereof. The manufacturing method comprises: forming a buffer layer and an active layer sequentially on a substrate, and forming an active region through a patterning process; forming a gate insulating layer and a gate electrode sequentially; forming Ni deposition openings; forming a dielectric layer having source/drain contact holes in a one-to-one correspondence with the Ni deposition openings; and forming source/drain electrodes which are connected with the active region via the source/drain contact holes and the Ni deposition openings.
Abstract:
A display substrate including a first display area including a plurality of first sub-pixels, a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the display substrate includes a plurality of first pixel groups each of which includes two third sub-pixels, one first sub-pixel and one second sub-pixel, the two third sub-pixels are arranged adjacent to each other along a first direction, the one first sub-pixel and the one second sub-pixel are adjacent to at least one of the two third sub-pixels, located on both sides of a straight line passing centers of the two third sub-pixels, and arranged along a second direction different from the first direction; a size of the first sub-pixel and the second sub-pixel in the second direction is smaller than a size of the first sub-pixel and the second sub-pixel in the first direction, respectively.
Abstract:
A pixel arrangement structure are provided, which includes a plurality of repeating units. Each of the plurality of repeating units includes two first sub-pixels, one second sub-pixel, and one third sub-pixel. Each of the first sub-pixel, the second sub-pixel and the third sub-pixel includes a pixel defining layer, the pixel defining layer includes a pixel defining layer opening to define an effective light emitting region of each sub-pixel; a plurality of first sub-pixels are arranged along the second direction to form a plurality of first sub-pixel groups, orthographic projections of pixel defining layer openings of the first sub-pixels in adjacent ones of the plurality of first sub-pixel groups on a straight line parallel to the second direction do not overlap each other.
Abstract:
A motherboard substrate, a motherboard panel, a display panel, a display device and a method for manufacturing the display panel are provided. The motherboard substrate comprises a plurality of display substrates arranged in an array and regions provided between adjacent display substrates. Each display substrate includes a region to be packaged; a first reflection structure is provided at the region to be packaged; a second reflection structure is provided on the outside of the display substrate and in the region between adjacent display substrates; and the second reflection structure and the first reflection structure are spaced apart from each other.
Abstract:
A pixel arrangement structure, a display panel and a display device are provided. The pixel arrangement structure includes a plurality of repeating units, each repeating unit includes one first sub-pixel, one second sub pixel and two third sub-pixels; the four sub-pixels of each repeating unit constitute two pixels, with the first sub-pixel and the second sub-pixel being shared by the two pixels; in a first direction of the pixel array, the sub-pixel density is equal to 1.5 times of the pixel density, in a second direction of the pixel array, the sub-pixel density is equal to 1.5 times of the pixel density; wherein, the first direction and the second direction are different directions.
Abstract:
An evaporation method includes: evaporating evaporation material and forming evaporation material particles towards one or more transfer substrates by means of an evaporation source, so as to form an intermediate material layer on a surface of the transfer substrate; heating the one or more transfer substrates to evaporate the intermediate material layer located on the transfer substrate towards a target substrate, a temperature of the heated transfer substrate being less than a temperature of the evaporation source. There is further disclosed an evaporation device.
Abstract:
A mask includes a graphic mask layer having a plurality of graphic mask blocks mutually spaced apart and arranged in parallel, and a covering mask layer having a plurality of covering mask blocks mutually spaced apart and arranged in parallel. The covering mask block covers a gap between adjacent graphic mask blocks. The graphic mask block includes an effective region, an ineffective region, and a marginal region between the effective region and the ineffective region, wherein each region has a plurality of pixel shaping openings, and the covering mask block further covers the pixel shaping openings of the ineffective regions of the adjacent graphic mask blocks. The motherboard is used for manufacturing the mask. The device for manufacturing mask comprises the motherboard, a base table, a stretcher and a welding machine. The system for evaporating the display substrate includes an evaporator and the mask.
Abstract:
An array substrate, a manufacturing method thereof and a display device are disclosed. Patterns comprising a gate, a gate insulating layer and a polysilicon active layer are formed on a base substrate by single patterning process. A passivation layer is formed on the substrate surface formed with the patterns, and patterns of a first via and a second via are formed on a surface of the passivation layer by single patterning process. Patterns of a source, a drain and a pixel electrode are formed on the substrate surface formed with the patterns by single patterning process. The source is electrically connected with the polysilicon active layer through the first via, and the drain is electrically connected with the polysilicon active layer through the second via. A pattern of pixel defining layer is formed on the substrate surface formed with the patterns by single patterning process.
Abstract:
The present application discloses a display panel. The display panel includes a first substrate; a second substrate facing the first substrate; a sealant layer between the first substrate and the second substrate sealing the first substrate and the second substrate together to form a cell; and a first conductive line layer having a first continuous conductive line configured to detect crack in the sealant layer. The first conductive line layer is in contact with the sealant layer.