Use of silicon oxynitride ARC for metal layers
    11.
    发明授权
    Use of silicon oxynitride ARC for metal layers 有权
    氧氮化硅ARC用于金属层

    公开(公告)号:US06326231B1

    公开(公告)日:2001-12-04

    申请号:US09207562

    申请日:1998-12-08

    IPC分类号: H01L2100

    摘要: In one embodiment, the present invention relates to a method of forming a silicon oxynitride antireflection coating over a metal layer, involving the steps of providing a semiconductor substrate comprising the metal layer over at least part of the semiconductor substrate; depositing a silicon oxynitride layer over the metal layer having a thickness from about 100 Å to about 150 Å; and forming an oxide layer having a thickness from about 5 Å to about 50 Å over the silicon oxynitride layer to provide the silicon oxynitride antireflection coating. In another embodiment, the present invention relates to a method of reducing an apparent reflectivity of a metal layer having a first reflectivity in a semiconductor structure, involing forming a silicon oxynitride antireflection coating over the metal layer; wherein the silicon oxynitride antireflection coating formed over the metal layer has a second reflectivity and is formed by depositing silicon oxynitride on the metal layer by chemical vapor deposition and forming an oxide layer over the oxynitride, and the difference between the first reflectivity and the second reflectivity is at least about 60%.

    摘要翻译: 在一个实施方案中,本发明涉及在金属层上形成氮氧化硅抗反射涂层的方法,包括以下步骤:在半导体衬底的至少一部分上提供包括金属层的半导体衬底; 在所述金属层上沉积厚度为约至约的氧氮化硅层; 并在氮氧化硅层上形成厚度约为5-20埃的氧化物层,以提供氮氧化硅抗反射涂层。 在另一个实施方案中,本发明涉及一种在半导体结构中减少具有第一反射率的金属层的表观反射率的方法,包括在金属层上形成氮氧化硅抗反射涂层; 其中形成在所述金属层上的所述氧氮化硅抗反射涂层具有第二反射率,并且通过化学气相沉积在所述金属层上沉积氧氮化硅并在所述氧氮化物上形成氧化物层,并且所述第一反射率和所述第二反射率之间的差异 至少约60%。

    Nozzle arm movement for resist development
    13.
    发明授权
    Nozzle arm movement for resist development 有权
    喷嘴臂运动用于抗蚀剂开发

    公开(公告)号:US06541184B1

    公开(公告)日:2003-04-01

    申请号:US09655979

    申请日:2000-09-06

    IPC分类号: G03C556

    CPC分类号: H01L21/6715 G03F7/3028

    摘要: A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a multiple tip nozzle and a movement system that moves the nozzle to an operating position above a central region of a photoresist material layer located on a substrate, and applies a volume of developer as the nozzle scan moves across a predetermined path. The movement system moves the nozzle in two dimensions by providing an arm that has a first arm member that is pivotable about a first rotational axis and a second arm member that is pivotable about a second rotational axis or is movable along a translational axis. The system also provides a measurement system that measures the thickness uniformity of the developed photoresist material layer disposed on a test wafer. The thickness uniformity data is used to reconfigure the predetermined path of the nozzle as the developer is applied. The thickness uniformity data can also be used to adjust the volume of developer applied along the path and/or the volume flow rate.

    摘要翻译: 提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。 该系统包括多个尖端喷嘴和运动系统,该运动系统将喷嘴移动到位于基板上的光致抗蚀剂材料层的中心区域上方的操作位置,并且当喷嘴扫描移动穿过预定路径时施加一定体积的显影剂。 移动系统通过提供具有第一臂构件的臂来移动喷嘴,该臂具有可围绕第一旋转轴线枢转的第一臂构件和可围绕第二旋转轴线枢转或可沿着平移轴线移动的第二臂构件。 该系统还提供了测量设置在测试晶片上的显影的光致抗蚀剂材料层的厚度均匀性的测量系统。 当施加显影剂时,厚度均匀性数据用于重新配置喷嘴的预定路径。 厚度均匀性数据也可用于调节沿路径施加的显影剂的体积和/或体积流量。

    Developer soluble dyed BARC for dual damascene process
    14.
    发明授权
    Developer soluble dyed BARC for dual damascene process 有权
    开发可溶染色的BARC用于双镶嵌工艺

    公开(公告)号:US06455416B1

    公开(公告)日:2002-09-24

    申请号:US09706967

    申请日:2000-11-06

    IPC分类号: H01L214763

    摘要: One aspect of the present invention relates to a method of processing a semiconductor structure, involving the steps of providing a substrate having an insulation layer thereover; forming a first antireflection coating over the insulation layer; patterning a first resist over the antireflection coating; forming a plurality of vias in the insulation layer and the first antireflection coating, the vias having a first width; filling the via with a second antireflection coating, the second antireflection coating comprising a dye and a film forming material; patterning a second resist over the structure and removing the second antireflection coating from the via; forming a trench over the plurality of vias in the insulation layer, the trench having a width that is larger than the average width of the vias; and filling the trench and vias with a conductive material. The present invention provides improved dual damascene methods for substrates by using a developer soluble ARC containing a dye to facilitate the formation of trenches directly over the previously formed vias.

    摘要翻译: 本发明的一个方面涉及一种处理半导体结构的方法,包括以下步骤:提供其上具有绝缘层的基板; 在所述绝缘层上形成第一抗反射涂层; 在抗反射涂层上图案化第一抗蚀剂; 在所述绝缘层和所述第一抗反射涂层中形成多个通孔,所述通孔具有第一宽度; 用第二抗反射涂层填充通孔,第二抗反射涂层包含染料和成膜材料; 在所述结构上形成第二抗蚀剂并从所述通孔去除所述第二抗反射涂层; 在所述绝缘层中的多个通孔上形成沟槽,所述沟槽的宽度大于所述通孔的平均宽度; 并用导电材料填充沟槽和通孔。 本发明通过使用含有染料的显影剂可溶性ARC来促进直接在先前形成的通孔上形成沟槽,从而为衬底提供改进的双镶嵌方法。

    UV-enhanced silylation process to increase etch resistance of ultra thin resists
    15.
    发明授权
    UV-enhanced silylation process to increase etch resistance of ultra thin resists 失效
    UV增强的硅烷化方法,以增加超薄抗蚀剂的耐蚀刻性

    公开(公告)号:US06451512B1

    公开(公告)日:2002-09-17

    申请号:US09565691

    申请日:2000-05-01

    IPC分类号: G03F700

    摘要: In one embodiment, the present invention relates to a method of processing an ultrathin resist, involving the steps of depositing the ultra-thin photoresist over a semiconductor substrate, the ultra-thin resist having a thickness less than about 3,000 Å; irradiating the ultra-thin resist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist; and contacting the ultra-thin resist with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist or after developing the ultra-thin resist.

    摘要翻译: 在一个实施方案中,本发明涉及一种处理超薄抗蚀剂的方法,包括以下步骤:在半导体衬底上沉积超薄光致抗蚀剂,超薄抗蚀剂的厚度小于约; 用波长约250nm或更小的电磁辐射照射超薄抗蚀剂; 开发超薄抗蚀剂; 以及在紫外光和臭氧中的至少一种的环境下使超薄抗蚀剂与含硅化合物接触,其中超薄抗蚀剂与含硅化合物的接触在照射和显影超薄抗蚀剂之间进行,或 在开发超薄抗蚀剂后。

    Nozzle arm movement for resist development
    16.
    发明授权
    Nozzle arm movement for resist development 有权
    喷嘴臂运动用于抗蚀剂开发

    公开(公告)号:US06248175B1

    公开(公告)日:2001-06-19

    申请号:US09430001

    申请日:1999-10-29

    IPC分类号: B05C1100

    CPC分类号: H01L21/6715 G03F7/3021

    摘要: A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a nozzle adapted to apply a predetermined volume of developer material on a photoresist material layer along a linear path having a length approximately equal to the diameter of the photoresist material layer. A movement system moves the nozzle to a first position offset from a central region of the photoresist material layer for applying a first predetermined volume of developer material to the photoresist material layer while the developer material is spin coated. The movement system also moves the nozzle to a second position offset from the central region for applying a second predetermined volume of developer material to the photoresist material layer while the developer is spin coated. The first position is located on an opposite side of the central region with respect to the second position. A method of adjusting the offset position and/or volume of developer material applied at the first and second position is also provided. The method utilizes developed photoresist material layer thickness data provided by a measurement system to adjust the offset position and/or volume of the developer.

    摘要翻译: 提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。 该系统包括适于沿着具有大致等于光致抗蚀剂材料层的直径的直线路径的光致抗蚀剂材料层上施加预定体积的显影剂材料的喷嘴。 移动系统将喷嘴移动到偏离光致抗蚀剂材料层的中心区域的第一位置,以在旋转涂覆显影剂材料的同时将第一预定体积的显影剂材料施加到光致抗蚀剂材料层。 移动系统还将喷嘴移动到偏离中心区域的第二位置,以在显影剂被旋涂时施加第二预定体积的显影剂材料到光致抗蚀剂材料层。 第一位置相对于第二位置位于中心区域的相反侧。 还提供了一种调节在第一和第二位置施加的显影剂材料的偏移位置和/或体积的方法。 该方法利用由测量系统提供的显影的光致抗蚀剂材料层厚度数据来调节显影剂的偏移位置和/或体积。

    Growing copper vias or lines within a patterned resist using a copper seed layer
    17.
    发明授权
    Growing copper vias or lines within a patterned resist using a copper seed layer 有权
    使用铜种子层在图案化抗蚀剂中生长铜通孔或线

    公开(公告)号:US06905950B2

    公开(公告)日:2005-06-14

    申请号:US09893198

    申请日:2001-06-27

    IPC分类号: H01L21/768 H01L21/3205

    CPC分类号: H01L21/76885 H01L21/76879

    摘要: The present invention involves a method for fabricating interconnecting lines and vias. According to the invention, copper is grown within the openings in a patterned coating. The patterned coating can be a resist coating or a dielectric coating. Either type of coating can be formed over a copper seed layer, whereby the seed layer is exposed within the pattern gaps. The copper seed layer can also be provided within the pattern gaps after patterning. Copper features are grown within the pattern gaps by plating. Where the patterned coating is a resist, the resist is stripped leaving the copper features in the inverse pattern image. The copper features can be coated with a diffusion barrier layer and a dielectric. The dielectric is polished to leave the dielectric filling the spaces between copper features. The invention provides copper lines and vias without the need for a dielectric or metal etching step. Another benefit of the invention is that lines widths can be increased by trimming the patterned coating prior to growing the copper features.

    摘要翻译: 本发明涉及制造互连线和通孔的方法。 根据本发明,铜在图案化涂层的开口内生长。 图案化的涂层可以是抗蚀剂涂层或介电涂层。 任何一种类型的涂层可以在铜籽晶层上形成,从而种子层在图案间隙内露出。 图案化之后也可以在图案间隙内提供铜籽晶层。 铜特征通过电镀在图案间隙内生长。 在图案涂层是抗蚀剂的情况下,剥离抗蚀剂,留下逆向图案图案中的铜特征。 铜的特征可以涂覆有扩散阻挡层和电介质。 电介质被抛光以留下电介质填充铜特征之间的空间。 本发明提供铜线和通孔,而不需要电介质或金属蚀刻步骤。 本发明的另一个好处是通过在生长铜特征之前修整图案化涂层可以增加线宽。

    Systems and methods to determine seed layer thickness of trench sidewalls
    18.
    发明授权
    Systems and methods to determine seed layer thickness of trench sidewalls 失效
    确定沟槽侧壁种子层厚度的系统和方法

    公开(公告)号:US06879051B1

    公开(公告)日:2005-04-12

    申请号:US10050454

    申请日:2002-01-16

    IPC分类号: C23C16/04 C23C16/52 H01L21/31

    CPC分类号: C23C16/045 C23C16/52

    摘要: One aspect of the present invention relates to a method to facilitate formation of seed layer portions on sidewall surfaces of a trench formed in a substrate. The method involves the steps of forming a conformal seed layer over a barrier layer disposed conformal to a trench, wherein the trench is formed in the substrate; reflecting a light beam of x-ray radiation at the seed layer sidewall portions; generating a measurement signal based on the reflected portion of the light beam; and determining a thickness of the sidewall portions based on the measurement signal while the sidewall portions are being formed over the trench.

    摘要翻译: 本发明的一个方面涉及一种促进在衬底中形成的沟槽的侧壁表面上形成种子层部分的方法。 该方法包括以下步骤:在与沟槽共形设置的阻挡层上形成保形种子层,其中沟槽形成在衬底中; 在种子层侧壁部分反射x射线辐射的光束; 基于所述光束的反射部分生成测量信号; 以及当在所述沟槽上形成所述侧壁部分时,基于所述测量信号来确定所述侧壁部分的厚度。

    Scatterometry techniques to ascertain asymmetry profile of features and generate a feedback or feedforward process control data associated therewith
    20.
    发明授权
    Scatterometry techniques to ascertain asymmetry profile of features and generate a feedback or feedforward process control data associated therewith 有权
    散射技术来确定特征的不对称轮廓,并产生与之相关联的反馈或前馈过程控制数据

    公开(公告)号:US06650422B2

    公开(公告)日:2003-11-18

    申请号:US09817820

    申请日:2001-03-26

    IPC分类号: G01B1100

    摘要: The present invention is directed to a method and a system for non-destructively, efficiently and accurately detecting asymmetry in the profile of a feature formed on a wafer during the process of semiconductor fabrication. The method encompasses directing a beam of light or radiation at a feature and detecting a reflected beam associated therewith. Data associated with the reflected beam is correlated with data associated with known feature profiles to ascertain profile characteristics associated with the feature of interest. Using the profile characteristics, an asymmetry of the feature is determined which is then used to generate feedback or feedforward process control data to compensate for or correct such asymmetry in subsequent processing.

    摘要翻译: 本发明涉及一种用于在半导体制造过程中非破坏性地,有效地和准确地检测在晶片上形成的特征的轮廓的不对称性的方法和系统。 该方法包括在特征处引导光束或辐射,并且检测与其相关联的反射光束。 与反射光束相关联的数据与与已知特征轮廓相关联的数据相关联,以确定与感兴趣特征相关联的轮廓特征。 使用简档特征,确定特征的不对称性,然后将其用于产生反馈或前馈过程控制数据,以补偿或纠正随后处理中的这种不对称性。