Dual layer patterning scheme to make dual damascene
    1.
    发明授权
    Dual layer patterning scheme to make dual damascene 失效
    双层图案方案制作双镶嵌

    公开(公告)号:US07078348B1

    公开(公告)日:2006-07-18

    申请号:US09893188

    申请日:2001-06-27

    IPC分类号: H01L21/302 H01L21/3065

    摘要: One aspect of the present invention relates to a method for making a dual damascene pattern in an insulative layer in a single etch process involving providing a wafer having at least one insulative layer formed thereon; depositing a first photoresist layer over the at least one insulative layer; patterning a first image into the first photoresist layer; curing the first patterned photoresist layer; depositing a second photoresist layer over the first patterned photoresist layer; patterning a second image into the second photoresist layer; and etching the at least one insulative layer through the first patterned photoresist layer and the second patterned photoresist layer simultaneously in the single etch process.

    摘要翻译: 本发明的一个方面涉及在单一蚀刻工艺中在绝缘层中制造双镶嵌图案的方法,该方法包括提供其上形成有至少一个绝缘层的晶片; 在所述至少一个绝缘层上沉积第一光致抗蚀剂层; 将第一图像图案化成第一光致抗蚀剂层; 固化第一图案化光致抗蚀剂层; 在所述第一图案化光致抗蚀剂层上沉积第二光致抗蚀剂层; 将第二图像图案化成第二光致抗蚀剂层; 以及在单次蚀刻工艺中同时蚀刻通过第一图案化光致抗蚀剂层和第二图案化光致抗蚀剂层的至少一个绝缘层。

    Active control of developer time and temperature
    2.
    发明授权
    Active control of developer time and temperature 失效
    主动控制显影时间和温度

    公开(公告)号:US06629786B1

    公开(公告)日:2003-10-07

    申请号:US09845232

    申请日:2001-04-30

    IPC分类号: G03D500

    CPC分类号: G03D5/00

    摘要: A system for regulating the time and temperature of a development process is provided. The system includes one or more light sources, each light source directing light to one or more gratings being developed on a wafer. Light reflected from the gratings is collected by a measuring system, which processes the collected light. Light passing through the gratings may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the progress of development of the respective portions of the wafer. The measuring system provides progress of development related data to a processor that determines the progress of development of the respective portions of the wafer. The system also includes a plurality of heating devices, each heating device corresponds to a respective portion of the developer and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the wafer.

    摘要翻译: 提供了一种用于调节开发过程的时间和温度的系统。 该系统包括一个或多个光源,每个光源将光引导到在晶片上显影的一个或多个光栅。 从光栅反射的光被测量系统收集,该系统处理收集的光。 通过光栅的光可以类似地由处理所收集的光的测量系统收集。 所收集的光表示晶片的各个部分的显影进展。 该测量系统提供开发相关数据的进展到处理器,该处理器确定晶片的相应部分的开发进度。 该系统还包括多个加热装置,每个加热装置对应于显影剂的相应部分并提供其加热。 处理器选择性地控制加热装置,以调节晶片各部分的温度。

    Use of RTA furnace for photoresist baking
    4.
    发明授权
    Use of RTA furnace for photoresist baking 有权
    使用RTA炉进行光刻胶烘烤

    公开(公告)号:US06335152B1

    公开(公告)日:2002-01-01

    申请号:US09564408

    申请日:2000-05-01

    IPC分类号: G03F738

    CPC分类号: G03F7/38

    摘要: In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.

    摘要翻译: 在一个实施方案中,本发明涉及一种处理被照射的光致抗蚀剂的方法,包括以下步骤:在快速热退火炉中将具有照射光致抗蚀剂的基底在第一温度下放置; 将其上具有照射的光致抗蚀剂的基板加热至约0.1秒至约10秒的第二温度; 将快速热退火炉中具有照射光致抗蚀剂的基板冷却至约0.1秒至约10秒的第三温度; 并且显影所述被照射的光致抗蚀剂,其中所述第二温度高于所述第一温度和所述第三温度。 在另一个实施方案中,本发明涉及一种处理含有光化辐射源的光致抗蚀剂的系统和用于选择性地照射光致抗蚀剂的掩模; 快速热退火炉,用于快速加热和快速冷却选择性照射的光致抗蚀剂,其中快速加热和快速冷却在约0.1秒至约10秒内独立进行; 以及用于将快速热退火炉加热并选择性地照射光致抗蚀剂的显影剂加工成图案化的光致抗蚀剂。

    Growing copper vias or lines within a patterned resist using a copper seed layer
    6.
    发明授权
    Growing copper vias or lines within a patterned resist using a copper seed layer 有权
    使用铜种子层在图案化抗蚀剂中生长铜通孔或线

    公开(公告)号:US06905950B2

    公开(公告)日:2005-06-14

    申请号:US09893198

    申请日:2001-06-27

    IPC分类号: H01L21/768 H01L21/3205

    CPC分类号: H01L21/76885 H01L21/76879

    摘要: The present invention involves a method for fabricating interconnecting lines and vias. According to the invention, copper is grown within the openings in a patterned coating. The patterned coating can be a resist coating or a dielectric coating. Either type of coating can be formed over a copper seed layer, whereby the seed layer is exposed within the pattern gaps. The copper seed layer can also be provided within the pattern gaps after patterning. Copper features are grown within the pattern gaps by plating. Where the patterned coating is a resist, the resist is stripped leaving the copper features in the inverse pattern image. The copper features can be coated with a diffusion barrier layer and a dielectric. The dielectric is polished to leave the dielectric filling the spaces between copper features. The invention provides copper lines and vias without the need for a dielectric or metal etching step. Another benefit of the invention is that lines widths can be increased by trimming the patterned coating prior to growing the copper features.

    摘要翻译: 本发明涉及制造互连线和通孔的方法。 根据本发明,铜在图案化涂层的开口内生长。 图案化的涂层可以是抗蚀剂涂层或介电涂层。 任何一种类型的涂层可以在铜籽晶层上形成,从而种子层在图案间隙内露出。 图案化之后也可以在图案间隙内提供铜籽晶层。 铜特征通过电镀在图案间隙内生长。 在图案涂层是抗蚀剂的情况下,剥离抗蚀剂,留下逆向图案图案中的铜特征。 铜的特征可以涂覆有扩散阻挡层和电介质。 电介质被抛光以留下电介质填充铜特征之间的空间。 本发明提供铜线和通孔,而不需要电介质或金属蚀刻步骤。 本发明的另一个好处是通过在生长铜特征之前修整图案化涂层可以增加线宽。

    Systems and methods to determine seed layer thickness of trench sidewalls
    7.
    发明授权
    Systems and methods to determine seed layer thickness of trench sidewalls 失效
    确定沟槽侧壁种子层厚度的系统和方法

    公开(公告)号:US06879051B1

    公开(公告)日:2005-04-12

    申请号:US10050454

    申请日:2002-01-16

    IPC分类号: C23C16/04 C23C16/52 H01L21/31

    CPC分类号: C23C16/045 C23C16/52

    摘要: One aspect of the present invention relates to a method to facilitate formation of seed layer portions on sidewall surfaces of a trench formed in a substrate. The method involves the steps of forming a conformal seed layer over a barrier layer disposed conformal to a trench, wherein the trench is formed in the substrate; reflecting a light beam of x-ray radiation at the seed layer sidewall portions; generating a measurement signal based on the reflected portion of the light beam; and determining a thickness of the sidewall portions based on the measurement signal while the sidewall portions are being formed over the trench.

    摘要翻译: 本发明的一个方面涉及一种促进在衬底中形成的沟槽的侧壁表面上形成种子层部分的方法。 该方法包括以下步骤:在与沟槽共形设置的阻挡层上形成保形种子层,其中沟槽形成在衬底中; 在种子层侧壁部分反射x射线辐射的光束; 基于所述光束的反射部分生成测量信号; 以及当在所述沟槽上形成所述侧壁部分时,基于所述测量信号来确定所述侧壁部分的厚度。

    Scatterometry techniques to ascertain asymmetry profile of features and generate a feedback or feedforward process control data associated therewith
    9.
    发明授权
    Scatterometry techniques to ascertain asymmetry profile of features and generate a feedback or feedforward process control data associated therewith 有权
    散射技术来确定特征的不对称轮廓,并产生与之相关联的反馈或前馈过程控制数据

    公开(公告)号:US06650422B2

    公开(公告)日:2003-11-18

    申请号:US09817820

    申请日:2001-03-26

    IPC分类号: G01B1100

    摘要: The present invention is directed to a method and a system for non-destructively, efficiently and accurately detecting asymmetry in the profile of a feature formed on a wafer during the process of semiconductor fabrication. The method encompasses directing a beam of light or radiation at a feature and detecting a reflected beam associated therewith. Data associated with the reflected beam is correlated with data associated with known feature profiles to ascertain profile characteristics associated with the feature of interest. Using the profile characteristics, an asymmetry of the feature is determined which is then used to generate feedback or feedforward process control data to compensate for or correct such asymmetry in subsequent processing.

    摘要翻译: 本发明涉及一种用于在半导体制造过程中非破坏性地,有效地和准确地检测在晶片上形成的特征的轮廓的不对称性的方法和系统。 该方法包括在特征处引导光束或辐射,并且检测与其相关联的反射光束。 与反射光束相关联的数据与与已知特征轮廓相关联的数据相关联,以确定与感兴趣特征相关联的轮廓特征。 使用简档特征,确定特征的不对称性,然后将其用于产生反馈或前馈过程控制数据,以补偿或纠正随后处理中的这种不对称性。

    Nozzle arm movement for resist development
    10.
    发明授权
    Nozzle arm movement for resist development 失效
    喷嘴臂运动用于抗蚀剂开发

    公开(公告)号:US06592932B2

    公开(公告)日:2003-07-15

    申请号:US09814131

    申请日:2001-03-21

    IPC分类号: B05D312

    CPC分类号: H01L21/6715 G03F7/3021

    摘要: A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a nozzle adapted to apply a predetermined volume of developer material on a photoresist material layer along a linear path having a length approximately equal to the diameter of the photoresist material layer. A movement system moves the nozzle to a first position offset from a central region of the photoresist material layer for applying a first predetermined volume of developer material to the photoresist material layer while the developer material is spin coated. The movement system also moves the nozzle to a second position offset from the central region for applying a second predetermined volume of developer material to the photoresist material layer while the developer is spin coated. The first position is located on an opposite side of the central region with respect to the second position. A method of adjusting the offset position and/or volume of developer material applied at the first and second position is also provided. The method utilizes developed photoresist material layer thickness data provided by a measurement system to adjust the offset position and/or volume of the developer.

    摘要翻译: 提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。 该系统包括适于沿着具有大致等于光致抗蚀剂材料层的直径的直线路径的光致抗蚀剂材料层上施加预定体积的显影剂材料的喷嘴。 移动系统将喷嘴移动到偏离光致抗蚀剂材料层的中心区域的第一位置,以在旋转涂覆显影剂材料的同时将第一预定体积的显影剂材料施加到光致抗蚀剂材料层。 移动系统还将喷嘴移动到偏离中心区域的第二位置,以在旋涂涂覆显影剂的同时将第二预定体积的显影剂材料施加到光致抗蚀剂材料层。 第一位置相对于第二位置位于中心区域的相反侧。 还提供了一种调节在第一和第二位置施加的显影剂材料的偏移位置和/或体积的方法。 该方法利用由测量系统提供的显影的光致抗蚀剂材料层厚度数据来调节显影剂的偏移位置和/或体积。