公开(公告)号：US20070246763A1

公开(公告)日：2007-10-25

申请号：US11460346

申请日：2006-07-27

Applicant: Chao-Hsi Chung

Inventor： Chao-Hsi Chung

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/42376 ,  H01L27/10873 ,  H01L29/1037 ,  H01L29/4933 ,  H01L29/66651 ,  H01L29/66659

Abstract: A trench step channel cell transistor and a manufacture method thereof are disclosed. The transistor could be applied to increase the channel length thereof. The transistor comprises a step silicon layer formed by a selective growth, while the step silicon layer is located above the active area of the transistor.

Abstract translation: 公开了一种沟槽级沟道单元晶体管及其制造方法。 可以施加晶体管以增加其沟道长度。 晶体管包括通过选择性生长形成的阶梯硅层，而步进硅层位于晶体管的有源区之上。

公开(公告)号：US20070212839A1

公开(公告)日：2007-09-13

申请号：US11308928

申请日：2006-05-26

Applicant: Chao-Hsi Chung ,  Wen-Shuo Kuo

Inventor： Chao-Hsi Chung ,  Wen-Shuo Kuo

IPC: H01L21/336

CPC classification number: H01L21/76897 ,  H01L21/28525 ,  H01L21/7682 ,  H01L21/76879

Abstract: A method for fabricating a semiconductor device is described. A gate dielectric layer is formed on a substrate. A plurality of gate structures are formed on the gate dielectric layer. Each of the gate structures is composed of a stacked structure and a spacer. Each stacked structure includes a gate conductive layer and a cap layer. The spacer includes a first dielectric layer and a second dielectric layer. A barrier layer is formed over the substrate covering conformally the gate structures and the gate dielectric layer. A dielectric layer is formed on the barrier layer. A self-aligned contact window etching process is conducted to form a contact window opening. A SEG process is conducted to grow an epitaxial silicon layer to form a contact window and an air gap in the opening.

Abstract translation: 对半导体装置的制造方法进行说明。 在基板上形成栅极电介质层。 在栅极电介质层上形成多个栅极结构。 每个栅极结构由堆叠结构和间隔物组成。 每个堆叠结构包括栅极导电层和盖层。 间隔件包括第一介电层和第二介电层。 阻挡层形成在覆盖保护栅极结构和栅极电介质层的衬底上。 在阻挡层上形成介电层。 进行自对准的接触窗蚀刻工艺以形成接触窗口。 进行SEG工艺以生长外延硅层以在开口中形成接触窗口和气隙。

公开(公告)号：US20070090436A1

公开(公告)日：2007-04-26

申请号：US11565633

申请日：2006-12-01

Applicant: Chao-Hsi Chung

Inventor： Chao-Hsi Chung

IPC: H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC classification number: H01L27/1087 ,  H01L27/10829 ,  H01L29/66181 ,  H01L29/945

Abstract: A deep trench capacitor disposed in a deep trench in a substrate is provided. The deep trench capacitor includes a bottom electrode disposed in the substrate surrounding a bottom of the deep trench; a first conductive layer disposed in the deep trench; a capacitor dielectric layer disposed between a lower surface of the deep trench and the first conductive layer; a second conductive layer disposed in the deep trench and above the first conductive layer; a collar oxide layer disposed between an upper surface of the deep trench and the second conductive layer; a third conductive layer disposed in the deep trench and above the second conductive layer; an isolation structure disposed in parts of the third conductive layer, the second conductive layer and the substrate; and an isolation layer disposed below the isolation structure and in parts of the second conductive layer and the substrate.

Abstract translation: 提供了设置在衬底中的深沟槽中的深沟槽电容器。 深沟槽电容器包括设置在衬底中的底部电极，围绕深沟槽的底部; 布置在所述深沟槽中的第一导电层; 设置在所述深沟槽的下表面和所述第一导电层之间的电容器电介质层; 设置在所述深沟槽中并位于所述第一导电层上方的第二导电层; 设置在所述深沟槽的上表面和所述第二导电层之间的环状氧化物层; 设置在所述深沟槽中并位于所述第二导电层上方的第三导电层; 设置在所述第三导电层，所述第二导电层和所述基板的一部分中的隔离结构; 以及隔离层，其设置在隔离结构的下方以及第二导电层和基板的一部分中。

公开(公告)号：US20060051916A1

公开(公告)日：2006-03-09

申请号：US10904479

申请日：2004-11-12

Applicant: Chao-Hsi Chung

Inventor： Chao-Hsi Chung

IPC: H01L21/8242

CPC classification number: H01L27/1087 ,  H01L27/10829 ,  H01L29/66181 ,  H01L29/945

Abstract: A method of fabrication deep trench capacitors includes forming a plurality of deep trenches in a substrate. A bottom electrode is formed in the substrate surrounding the bottom of each deep trench. A capacitor dielectric layer and a first conductive layer are formed at the bottom of each deep trench. A collar oxide layer is formed on the sidewall of the deep trench exposed by the first conductive layer. A second conductive layer fills each deep trench. An opening is formed in a region predetermined for an isolation structure between adjacent deep trenches, wherein the depth of the opening is greater than that of the isolation structure. An isolation layer is filled in the opening.

Abstract translation: 制造深沟槽电容器的方法包括在衬底中形成多个深沟槽。 底部电极形成在每个深沟槽的底部周围的基板中。 在每个深沟槽的底部形成电容器电介质层和第一导电层。 在由第一导电层暴露的深沟槽的侧壁上形成环状氧化物层。 第二导电层填充每个深沟槽。 在相邻深沟槽之间的隔离结构预定的区域中形成开口，其中开口的深度大于隔离结构的深度。 隔离层填充在开口中。

公开(公告)号：US6074291A

公开(公告)日：2000-06-13

申请号：US250952

申请日：1999-02-16

Applicant: Wen-Tung Chang ,  Chao-Hsi Chung

Inventor： Wen-Tung Chang ,  Chao-Hsi Chung

IPC: B24B37/30 ,  B24B41/06

CPC classification number: B24B37/30

Abstract: An apparatus for preparing an ultra-thin specimen with a polishing wheel is developed. The apparatus includes a base, a holding unit mounted on the base and having a movable part for supporting the specimen, and an adjusting assembly attached to the base for adjusting an orientation of the specimen relative to a top surface of the polishing wheel by providing a fine movement during polishing. The movable part of the holding unit is advantageously moved away from the adjusting assembly to enlarge the latitudinal cross-section of the apparatus so as to increase the precision of the orientation.

Abstract translation: 开发了一种用抛光轮制备超薄样品的设备。 该装置包括基座，保持单元，其安装在基座上并具有用于支撑试件的可移动部分，以及附接到基座的调节组件，用于通过提供试样相对于抛光轮的顶表面来调整样本的取向 抛光过程中精细的动作。 保持单元的可移动部分有利地远离调节组件移动，以扩大装置的纬度横截面，从而提高取向的精度。