公开(公告)号：US08207469B2

公开(公告)日：2012-06-26

申请号：US12156560

申请日：2008-06-02

Applicant: Cheng-En Ho ,  Wei-Hsiang Wu

Inventor： Cheng-En Ho ,  Wei-Hsiang Wu

IPC: B23K11/00

CPC classification number: B23K1/0016 ,  H05K3/3436 ,  H05K2201/0769 ,  H05K2203/105 ,  H05K2203/1492 ,  Y02P70/613

Abstract: A method for inhibiting electromigration-induced phase segregation suitable for solder joint configurations used in a chip package is described as following. First, a chip package including a wiring board, a chip and numbers of solder joints is provided, wherein the chip is disposed on the wiring board, and the solder joints are disposed between the chip and the wiring board to electrically connect the chip to the wiring board. Next, a first current and a second current are alternately applied to a side of the solder joints, wherein flowing directions of the first current and the second current are opposite. The current density of the first current is 103˜105 A/cm2, and the current density of the second current is 103˜105 A/cm2.

Abstract translation: 下面描述一种用于抑制适用于芯片封装中使用的焊点配置的电迁移诱导相分离的方法。 首先，提供包括布线板，芯片和焊点数量的芯片封装，其中芯片设置在布线板上，并且焊点设置在芯片和布线板之间，以将芯片电连接到 接线板 接下来，第一电流和第二电流交替地施加到焊点的一侧，其中第一电流和第二电流的流动方向相反。 第一电流的电流密度为103〜105A / cm 2，第二电流的电流密度为103〜105A / cm 2。

公开(公告)号：US20100127047A1

公开(公告)日：2010-05-27

申请号：US12352979

申请日：2009-01-13

Applicant: Cheng-En Ho ,  Wei-Hsiang Wu ,  Cheng-Shiuan Lin

Inventor： Cheng-En Ho ,  Wei-Hsiang Wu ,  Cheng-Shiuan Lin

IPC: B23K31/02

CPC classification number: B23K1/20 ,  B23K35/262 ,  B23K35/268 ,  B23K35/40 ,  H05K3/244 ,  H05K3/3463

Abstract: A method of inhibiting a formation of palladium-nickel-tin (Pd—Ni—Sn) intermetallic in solder joints is described as follows. Firstly, a solder alloy is provided. Then, at least one of a trace of copper and a trace of zinc is doped into the solder alloy. Afterward, the solder alloy is disposed on the Pd-bearing surface finish, such as a Pd/Ni bi-layer or a Au/Pd/Ni tri-layer. Next, the solder alloy is soldered with the surface finish as solder joints. During the soldering, the Cu and Zn will incorporate into the soldering reaction, forming copper-palladium-nickel-tin intermetallic and zinc-palladium-nickel-tin intermetallic, replacing the Pd—Ni—Sn respectively. Consequently, the addition of Cu and/or Zn into solders will inhibit the undesirable Pd—Ni—Sn intermetallic to form in the solder joints.

Abstract translation: 描述了在焊接接头中抑制钯 - 镍 - 锡（Pd-Ni-Sn）金属间化合物形成的方法。 首先，提供焊料合金。 然后，将铜和痕量锌中的至少一种掺杂到焊料合金中。 之后，将焊料合金设置在Pd载体表面光洁度上，例如Pd / Ni双层或Au / Pd / Ni三层。 接下来，焊接合金以表面光洁度焊接作为焊点。 在焊接过程中，Cu和Zn将引入焊接反应，形成铜 - 钯 - 镍 - 锡金属间化合物和锌 - 钯 - 镍 - 锡金属间化合物，分别代替Pd-Ni-Sn。 因此，将Cu和/或Zn添加到焊料中将抑制在焊点中形成不期望的Pd-Ni-Sn金属间化合物。

公开(公告)号：US20090294409A1

公开(公告)日：2009-12-03

申请号：US12156560

申请日：2008-06-02

Applicant: Cheng-En Ho ,  Wei-Hsiang Wu

Inventor： Cheng-En Ho ,  Wei-Hsiang Wu

IPC: B23K11/00

CPC classification number: B23K1/0016 ,  H05K3/3436 ,  H05K2201/0769 ,  H05K2203/105 ,  H05K2203/1492 ,  Y02P70/613

Abstract: A method for inhibiting electromigration-induced phase segregation suitable for solder joint configurations used in a chip package is described as following. First, a chip package including a wiring board, a chip and numbers of solder joints is provided, wherein the chip is disposed on the wiring board, and the solder joints are disposed between the chip and the wiring board to electrically connect the chip to the wiring board. Next, a first current and a second current are alternately applied to a side of the solder joints, wherein flowing directions of the first current and the second current are opposite. The current density of the first current is 103˜105 A/cm2, and the current density of the second current is 103˜105 A/cm2.

Abstract translation: 下面描述一种用于抑制适用于芯片封装中使用的焊点配置的电迁移诱导相分离的方法。 首先，提供包括布线板，芯片和焊点数量的芯片封装，其中芯片设置在布线板上，并且焊点设置在芯片和布线板之间，以将芯片电连接到 接线板 接下来，第一电流和第二电流交替地施加到焊点的一侧，其中第一电流和第二电流的流动方向相反。 第一电流的电流密度为103〜105A / cm2，第二电流的电流密度为103〜105A / cm2。