Abstract:
A method for testing a digital to analog converter, which operates in an undersampling environment, wherein signals of a tested DAC and a signal generator are modulated by a PWM device and then processed by a digital processing circuit to generate a digital signal, whereby is formed a low-speed equivalent ADC. The signal generator is provided by uniform-distribution random test patterns, and the signal generator generates an uniform-distribution random analog signal to the equivalent ADC. Thereby, the test error caused by the non-ideality of the signal generator is corrected, and the tested circuit can work in a full speed.
Abstract:
The present invention relates to a method for controlling the formation of the intermetallic compounds in solder joints, The types of the intermetallic compounds between the SnAgCu solders and the Ni-bearing substrate can be controlled by adjusting the copper concentration in the SnAgCu solders. If the SnAgCu solder has a copper concentration higher than or equivalent to 0.6 wt. %, the soldering intermetallic compound includes a continuous (Cu1−xNix)6Sn5 layer. If the copper concentration of the SnAgCu solders is lower than or equivalent to 0.4 wt. %, the soldering intermetallic compound includes a continuous (Ni1−yCuy)3Sn4 layer and a non-continuous (Cu1−xNix)6Sn5 layer. If the copper concentration of the SnAgCu solders is between 0.4 wt. % to 0.6 wt. %, the soldering intermetallic compound includes the continuous (Cu1−xNix)6Sn5.
Abstract:
A method for controlling the beta-tin crystal orientation in solder joints is provided. The method is suitable for joining metallization pads using a solder containing tin and silver. By adjusting the silver content in the solder within a specific range of equal to or more than 2.5 wt. % and less than 3.2 wt. %, the [001] axes of beta-tin crystals in the solder is aligned to be in the direction parallel with a solder/metallization pad interface substantially. Electromigration-induced solder deformations and metallization pad consumption can be significantly reduced when solder joints have such a microstructure. Additionally, the undesired Ag3Sn plates in the solder matrix can be avoided accordingly.
Abstract:
A method for controlling the beta-tin crystal orientation in solder joints is provided. The method is suitable for joining metallization pads using a solder containing tin and silver. By adjusting the silver content in the solder within a specific range of equal to or more than 2.5 wt. % and less than 3.2 wt. %, the [001] axes of beta-tin crystals in the solder is aligned to be in the direction parallel with a solder/metallization pad interface substantially. Electromigration-induced solder deformations and metallization pad consumption can be significantly reduced when solder joints have such a microstructure. Additionally, the undesired Ag3Sn plates in the solder matrix can be avoided accordingly.
Abstract:
A method for inhibiting the growth of a nickel-copper-tin intermetallic (i.e. (Ni,Cu)3Sn4) layer at the (Cu,Ni)6Sn5/nickel interface of a solder joint is described as follows. A Sn—Ag—Cu solder alloy with a Cu-content of 0.5˜1 weight percent (wt. %) is provided. The solder alloy is disposed on a surface finish of a soldering pad, having a nickel-based metallization layer. A material of the solder alloy further includes palladium. The solder alloy is joined with the surface finish, so as to form the solder joint containing palladium that enables to inhibit the growth of the undesired (Ni,Cu)3Sn4 layer between the (Cu,Ni)6Sn5 and nickel in the subsequent use at temperatures ranging from 100° C. to 180° C.
Abstract translation:焊接接头的(Cu,Ni)6Sn5 /镍界面处的镍 - 铜 - 锡 - 金属间化合物(即(Ni,Cu)3Sn4)层的生长抑制方法如下所述。 提供Cu含量为0.5〜1重量%(重量%)的Sn-Ag-Cu焊料合金。 焊料合金设置在具有镍基金属化层的焊盘的表面光洁度上。 焊料合金的材料还包括钯。 焊料合金与表面光洁度相结合,以形成含钯的焊点,其能够抑制(Cu,Ni)6 Sn 5和镍之间不期望的(Ni,Cu)3 Sn 4层在随后的使用中的生长 温度范围从100°C到180°C
Abstract:
The embodiment of the present invention relates to a method for suppressing Kirkendall voids formation in a solder joint. A solder alloy doped with 0.1˜0.7 weight percent (wt. %) of palladium (Pd) is utilized. Before soldering, the solder alloy is disposed on a copper (Cu) pad, possibly treated with a surface finish. Subsequently, the solder alloy is joined with the Cu pad, so as to form the solder joint with a Cu/Cu3Sn/(Cu,Pd)6Sn5/solder structure. The formation of Kirkendall voids at the Cu/Cu3Sn interface is greatly suppressed in the presence of Pd in the solder. As the amount of Pd doped is minimal, the properties and the processing conditions for soldering are not changed to a large extent, and the mechanical reliability of the solder joint is significantly improved. Therefore, the present invention is suitable for the microelectronic packaging applications.
Abstract translation:本发明的实施例涉及一种用于抑制焊点中Kirkendall空隙形成的方法。 使用掺杂有0.1〜0.7重量百分比(重量%)钯(Pd)的焊料合金。 在焊接之前,焊料合金设置在铜(Cu)焊盘上,可能用表面光洁度处理。 随后,焊料合金与Cu焊盘接合,以形成具有Cu / Cu 3 Sn /(Cu,Pd)6 Sn 5 /焊料结构的焊点。 在焊料中存在Pd时,Cu / Cu 3 Sn界面处的Kirkendall孔隙的形成受到极大的抑制。 随着Pd掺杂量的降低,钎焊的性能和加工条件并没有大的变化,焊点的机械可靠性明显提高。 因此,本发明适用于微电子封装应用。
Abstract:
A method for testing a digital to analog converter, which operates in an undersampling environment, wherein signals of a tested DAC and a signal generator are modulated by a PWM device and then processed by a digital processing circuit to generate a digital signal, whereby is formed a low-speed equivalent ADC. The signal generator is provided by uniform-distribution random test patterns, and the signal generator generates an uniform-distribution random analog signal to the equivalent ADC. Thereby, the test error caused by the non-ideality of the signal generator is corrected, and the tested circuit can work in a full speed.
Abstract:
A high speed ball shear machine is adapted for removing a metal bump fixed on a substrate. The high speed ball shear machine includes a fixing base, a shear tool, and a metal bump catcher. The substrate is fixed on the top surface of the fixing base. The shear tool is disposed above the top surface. The fixing base is adapted for being translated along a translation path relative to the shear tool, wherein the translation path is a straight path. When the fixing base translates along the path, the metal bump is driven to strike the shear tool so as to separate itself from the substrate. The metal bump catcher, which is adapted for catching the drop bump after the striking, is disposed on the side wall of the fixing base. The bump catcher has a fillister with a configuration depicted in the figures of this invention.
Abstract:
A high speed ball shear machine is adapted for removing a metal bump fixed on a substrate. The high speed ball shear machine includes a fixing base, a shear tool, and a metal bump catcher. The substrate is fixed on the top surface of the fixing base. The shear tool is disposed above the top surface. The fixing base is adapted for being translated along a translation path relative to the shear tool, wherein the translation path is a straight path. When the fixing base translates along the path, the metal bump is driven to strike the shear tool so as to separate itself from the substrate. The metal bump catcher, which is adapted for catching the drop bump after the striking, is disposed on the side wall of the fixing base. The bump catcher has a fillister with a configuration depicted in the figures of this invention.
Abstract:
A method for inhibiting electromigration-induced phase segregation suitable for solder joint configurations used in a chip package is described as following. First, a chip package including a wiring board, a chip and numbers of solder joints is provided, wherein the chip is disposed on the wiring board, and the solder joints are disposed between the chip and the wiring board to electrically connect the chip to the wiring board. Next, a first current and a second current are alternately applied to a side of the solder joints, wherein flowing directions of the first current and the second current are opposite. The current density of the first current is 103˜105 A/cm2, and the current density of the second current is 103˜105 A/cm2.
Abstract translation:下面描述一种用于抑制适用于芯片封装中使用的焊点配置的电迁移诱导相分离的方法。 首先,提供包括布线板,芯片和焊点数量的芯片封装,其中芯片设置在布线板上,并且焊点设置在芯片和布线板之间,以将芯片电连接到 接线板 接下来,第一电流和第二电流交替地施加到焊点的一侧,其中第一电流和第二电流的流动方向相反。 第一电流的电流密度为103〜105A / cm 2,第二电流的电流密度为103〜105A / cm 2。