Fast axis beam profile shaping for high power laser diode based annealing system
    11.
    发明授权
    Fast axis beam profile shaping for high power laser diode based annealing system 有权
    基于高功率激光二极管的退火系统的快轴光束轮廓成形

    公开(公告)号:US08288683B2

    公开(公告)日:2012-10-16

    申请号:US12291002

    申请日:2008-11-04

    IPC分类号: B23K26/00

    摘要: A dynamic surface anneal apparatus for annealing a semiconductor workpiece has a workpiece support for supporting a workpiece, an optical source and scanning apparatus for scanning the optical source and the workpiece support relative to one another along a fast axis. The optical source includes an array of laser emitters arranged generally in successive rows of the emitters, the rows being transverse to the fast axis. Plural collimating lenslets overlie respective ones of the rows of emitters and provide collimation along the fast axis. The selected lenslets have one or a succession of optical deflection angles corresponding to beam deflections along the fast axis for respective rows of emitters. Optics focus light from the array of laser emitters onto a surface of the workpiece to form a succession of line beams transverse to the fast axis spaced along the fast axis in accordance with the succession of deflection angles.

    摘要翻译: 用于退火半导体工件的动态表面退火装置具有用于支撑工件的工件支撑件,用于沿着快轴相对于彼此扫描光源和工件支撑件的光源和扫描装置。 光源包括大致以发射器的连续行布置的激光发射器的阵列,该列横向于快轴。 多个准直的小透镜叠加在发射器排中的相应行上,并沿着快轴提供准直。 所选择的小透镜具有对应于沿着快轴的光束偏转的相应行发射器的一个或一系列光学偏转角。 将来自激光发射器阵列的光聚焦到工件的表面上,以根据偏转角的顺序形成一系列沿着快轴间隔开的快轴的线束。

    REAL TIME PROCESS MONITORING AND CONTROL FOR SEMICONDUCTOR JUNCTIONS
    12.
    发明申请
    REAL TIME PROCESS MONITORING AND CONTROL FOR SEMICONDUCTOR JUNCTIONS 失效
    用于半导体结的实时过程监控和控制

    公开(公告)号:US20110259391A1

    公开(公告)日:2011-10-27

    申请号:US13157058

    申请日:2011-06-09

    IPC分类号: H01L31/042 H01L31/18

    摘要: A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB2VIA composition. A first deposition state is monitored, during the second deposition by making a first plurality of measurements of a first deposition state. The second deposition is terminated or attenuated based on a function of the first plurality of measurements of the indicia of the first deposition state.

    摘要翻译: 提供一种制造半导体层的方法。 在第一时间段内的第一沉积中,至少一个IIIA族元素和至少一个第VIA族元素沉积在衬底上或可选择地设置在诸如背面电极的衬底上的层上。 在第二时间段期间的第二沉积期间,至少一个IB族元件和至少一个VIA元件沉积在基底或可选层上。 一组IB元素与VIA元素组合形成IB2VIA组合物。 通过进行第一沉积状态的第一多个测量,在第二沉积期间监测第一沉积状态。 基于第一沉积状态的标记的第一多个测量的函数,第二沉积被终止或衰减。

    Real time process monitoring and control for semiconductor junctions
    13.
    发明申请
    Real time process monitoring and control for semiconductor junctions 失效
    实时过程监测和半导体连接控制

    公开(公告)号:US20080041439A1

    公开(公告)日:2008-02-21

    申请号:US11893416

    申请日:2007-08-16

    IPC分类号: H01L31/042 B05C11/00

    摘要: A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB2VIA composition. A first deposition state is monitored, during the second deposition by making a first plurality of measurements of a first deposition state. The second deposition is terminated or attenuated based on a function of the first plurality of measurements of the indicia of the first deposition state.

    摘要翻译: 提供一种制造半导体层的方法。 在第一时间段内的第一沉积中,至少一个IIIA族元素和至少一个第VIA族元素沉积在衬底上或可选择地设置在诸如背面电极的衬底上的层上。 在第二时间段期间的第二沉积期间,至少一个IB族元件和至少一个VIA元件沉积在基底或可选层上。 一组IB元素与组VIA元素组合以形成IB< 2> VIA组合物。 通过进行第一沉积状态的第一多个测量,在第二沉积期间监测第一沉积状态。 基于第一沉积状态的标记的第一多个测量的函数,第二沉积被终止或衰减。