公开(公告)号：US10720518B2

公开(公告)日：2020-07-21

申请号：US16351755

申请日：2019-03-13

Applicant: DENSO CORPORATION

Inventor： Masakiyo Sumitomo

IPC: H01L29/732 ,  H01L29/739 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/10 ,  H01L29/40

Abstract: A semiconductor device includes a drift layer, a base layer, a collector layer, gate insulating films, gate electrodes, an emitter region, a first electrode and a second electrode. The base layer is provided on the drift layer. The drift layer is provided between the base layer and the collector layer. The gate insulating films are respectively provided on wall surfaces of trenches penetrating the base layer to reach the drift layer. The gate electrodes are respectively provided on the gate insulating films. The emitter region is provided in a surface layer portion of the base layer, and is in contact with the trenches. The first electrode is electrically coupled with the base layer and the emitter region. The second electrode is electrically coupled with the collector layer. Some gate electrodes are applied with a gate voltage. Other gate electrodes are electrically coupled to the first electrode.

公开(公告)号：US10224322B2

公开(公告)日：2019-03-05

申请号：US15578318

申请日：2016-07-22

Applicant: DENSO CORPORATION

Inventor： Weitao Cheng ,  Shigeki Takahashi ,  Masakiyo Sumitomo

IPC: H01L27/06 ,  H01L21/8234 ,  H01L29/739 ,  H01L27/04 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/861 ,  H01L29/40

Abstract: A semiconductor device includes a diode provided with: a drift layer being a first conductivity type; a cathode region being provided in a back face side of the drift layer and being the first conductivity type; a second conductivity type region provided in a surface layer part of the drift layer; multiple trenches dividing the second conductivity type region into pieces by being provided deeper than the second conductivity type region, and configuring an anode region; a gate insulation film provided in a surface of the trench; a gate electrode provided in a surface of the gate insulation film; an upper electrode electrically connected with the anode region; and a lower electrode electrically connected with the cathode region. A width between the trenches is narrowest in the drift layer is defined as a mesa width. The mesa width is set to be equal to or greater than 0.3 μm.

公开(公告)号：US10388773B2

公开(公告)日：2019-08-20

申请号：US15310244

申请日：2015-07-07

Applicant: DENSO CORPORATION

Inventor： Masakiyo Sumitomo ,  Shigeki Takahashi

IPC: H01L29/739 ,  H01L29/78 ,  H01L27/04 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L29/423 ,  H01L29/861 ,  H01L29/06

Abstract: A semiconductor device includes: a drift layer; a base layer on the drift layer; a collector layer and a cathode layer opposite to the base layer; multiple trenches penetrating the base layer; a gate electrode in each trench; an emitter region in a surface portion of the base layer and contacting each trench; a first electrode connected to the base layer and the emitter region; and a second electrode connected to the collector layer and the cathode layer. The gate electrodes in a diode region of a semiconductor substrate are controlled independently from the gate electrodes in the IGBT region. A voltage not forming an inversion layer in the base layer is applied to the gate electrodes in the diode region.

公开(公告)号：US10103255B2

公开(公告)日：2018-10-16

申请号：US15544898

申请日：2016-02-22

Applicant: DENSO CORPORATION

Inventor： Masakiyo Sumitomo ,  Masahiro Ogino ,  Yukihiro Kato

IPC: H01L29/739 ,  H01L23/485 ,  H01L29/78

Abstract: A semiconductor device includes: a semiconductor substrate having a drift layer; a base layer and a carrier storage layer over the drift layer; a collector layer on the drift layer opposite to the base layer; multiple trenches penetrating the base layer and the carrier storage layer and reaching the drift layer; a gate electrode on an insulation film in each trench; and an emitter region in a surface portion of the base layer contacting each trench. A thickness of at least a portion of a part of the gate insulation film on a sidewall of each trench on a collector layer side from a peak position, at which the impurity concentration of the carrier storage layer is highest, is thicker than a thickness of another part of the gate insulation film on the sidewall of an opening portion side of the trench from the peak position.

公开(公告)号：US09324848B2

公开(公告)日：2016-04-26

申请号：US14395868

申请日：2013-05-28

Applicant: DENSO CORPORATION

Inventor： Masakiyo Sumitomo ,  Shigemitsu Fukatsu

IPC: H01L29/739 ,  H01L29/66 ,  H01L29/423 ,  H01L29/08 ,  H01L29/78

CPC classification number: H01L29/7395 ,  H01L29/0839 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66325 ,  H01L29/7397 ,  H01L29/7827

Abstract: A semiconductor device includes a first conductivity-type drift layer, a second conductivity-type base layer formed in a front surface portion of the drift layer, a second conductivity-type collector layer formed in the drift layer and separated from the base layer, gate insulation layers formed on a surface of the base layer, gate electrodes individually formed on the gate insulation layers, an emitter layer formed in a front surface portion of the base layer, an emitter electrode electrically connected to the emitter layer and the base layer, and a collector electrode electrically connected to the collector layer. A rate of change in a gate voltage of a part of the gate electrodes is smaller than a rate of change in a gate voltage of a remainder of the gate electrodes. The emitter layer is in contact with only the gate insulation layers provided with the part of the gate electrodes.

Abstract translation: 半导体器件包括第一导电型漂移层，形成在漂移层的前表面部分中的第二导电型基极层，形成在漂移层中并与基极层分离的第二导电型集电极，栅极 形成在基底层的表面上的绝缘层，分别形成在栅极绝缘层上的栅电极，形成在基极层的前表面部分中的发射极层，电连接到发射极层和基极层的发射极，以及 电极连接到集电极层的集电极。 一部分栅电极的栅极电压的变化率小于剩余栅电极的栅极电压的变化率。 发射极层仅与设置有栅极部分的栅极绝缘层接触。

公开(公告)号：US20150129927A1

公开(公告)日：2015-05-14

申请号：US14395868

申请日：2013-05-28

Applicant: DENSO CORPORATION

Inventor： Masakiyo Sumitomo ,  Shigemitsu Fukatsu

IPC: H01L29/739

CPC classification number: H01L29/7395 ,  H01L29/0839 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66325 ,  H01L29/7397 ,  H01L29/7827

Abstract: A semiconductor device includes a first conductivity-type drift layer, a second conductivity-type base layer formed in a front surface portion of the drift layer, a second conductivity-type collector layer formed in the drift layer and separated from the base layer, gate insulation layers formed on a surface of the base layer, gate electrodes individually formed on the gate insulation layers, an emitter layer formed in a front surface portion of the base layer, an emitter electrode electrically connected to the emitter layer and the base layer, and a collector electrode electrically connected to the collector layer. A rate of change in a gate voltage of a part of the gate electrodes is smaller than a rate of change in a gate voltage of a remainder of the gate electrodes. The emitter layer is in contact with only the gate insulation layers provided with the part of the gate electrodes.

Abstract translation: 半导体器件包括第一导电型漂移层，形成在漂移层的前表面部分中的第二导电型基极层，形成在漂移层中并与基极层分离的第二导电型集电极，栅极 形成在基底层的表面上的绝缘层，分别形成在栅极绝缘层上的栅电极，形成在基极层的前表面部分中的发射极层，电连接到发射极层和基极层的发射极，以及 电极连接到集电极层的集电极。 一部分栅电极的栅极电压的变化率小于剩余栅电极的栅极电压的变化率。 发射极层仅与设置有栅极部分的栅极绝缘层接触。

公开(公告)号：US20140339602A1

公开(公告)日：2014-11-20

申请号：US14375895

申请日：2013-02-18

Applicant: DENSO CORPORATION

Inventor： Yasushi Higuchi ,  Masakiyo Sumitomo

IPC: H01L29/739 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7393 ,  H01L29/0808 ,  H01L29/1008 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/7394 ,  H01L29/7397 ,  H01L29/7824 ,  H01L29/7825

Abstract: In a trench-gate-type insulated gate bipolar transistor, a current will not flow down to a lower portion of a trench, a high electrical field at the lower portion of the trench is suppressed even if a high voltage is applied, such as at a time of turning off, an increase in on-state resistance and a decrease in breakdown resistance and withstand voltage are suppressed. In the semiconductor device, a plurality of trenches is disposed to reach a rear surface of a drift layer, and a collector layer is disposed at a tip end side in an extended direction of the trenches in a surface layer portion of the drift layer. When a gate electrode is applied with a predetermined voltage, a channel region is formed in a portion of the base layer contacting the trenches, and an electric current flows in the predetermined direction along the trenches.

Abstract translation: 在沟槽栅型绝缘栅双极晶体管中，电流不会向下流到沟槽的下部，即使施加高电压，也抑制沟槽下部的高电场，例如在 关断时间，抑制导通电阻的上升和耐击穿电压和耐电压的降低。 在半导体器件中，设置多个沟槽到达漂移层的后表面，并且集电极层设置在漂移层的表面层部分中的沟槽的延伸方向的前端侧。 当施加预定电压的栅电极时，在接触沟槽的基底层的一部分中形成沟道区，并且电流沿着沟槽沿预定方向流动。

公开(公告)号：US20140209972A1

公开(公告)日：2014-07-31

申请号：US14346755

申请日：2012-10-18

Applicant: DENSO CORPORATION

Inventor： Masakiyo Sumitomo ,  Shigemitsu Fukatsu

IPC: H01L29/739

CPC classification number: H01L29/7397 ,  H01L29/4232 ,  H01L29/4236 ,  H01L29/4238

Abstract: In a semiconductor device, gate electrodes in a first group are connected with a first gate pad and gate electrodes in a second group are connected with a second gate pad. The gate electrodes in the first group and the gate electrodes in the second group are controllable independently from each other through the first gate pad and the second gate pad. When turning off, after a turn-off voltage with which an inversion layer is not formed is applied to the gate electrodes in the second group, a turn-off voltage with which an inversion layer is not formed is applied to the gate electrodes in the first group.

Abstract translation: 在半导体器件中，第一组中的栅电极与第一栅极焊盘连接，第二组中的栅电极与第二栅极焊盘连接。 第一组中的栅极电极和第二组中的栅极电极通过第一栅极焊盘和第二栅极焊盘彼此独立地控制。 当关闭时，在没有形成反转层的关断电压之后，施加到第二组中的栅电极，在栅电极中施加没有形成反转层的截止电压 第一组。