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    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11056584B2

    公开(公告)日：2021-07-06

    申请号：US16693598

    申请日：2019-11-25

    Applicant: DENSO CORPORATION

    Inventor： Kensuke Hata ,  Shinichi Hoshi ,  Hideo Matsuki ,  Youngshin Eum ,  Shigeki Takahashi

    IPC: H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L29/80

    Abstract: In a semiconductor device having an active region and an inactive region, the active region includes a channel forming layer with a heterojunction structure having first and second semiconductor layers, a gate structure portion having a MOS gate electrode, a source electrode and a drain electrode disposed on the second semiconductor layer with the gate structure portion interposed therebetween, a third semiconductor layer disposed at a position away from the drain electrode between the gate structure portion and the drain electrode and not doped with an impurity, a p-type fourth semiconductor layer disposed on the third semiconductor layer, and a junction gate electrode brought into contact with the fourth semiconductor layer. The junction gate electrode is electrically connected to the source electrode to have a same potential as a potential of the source electrode, and is disposed only in the active region.

    Semiconductor device including carrier injection layers
    2.
    发明授权
    Semiconductor device including carrier injection layers 有权

    公开(公告)号：US11289476B2

    公开(公告)日：2022-03-29

    申请号：US16833977

    申请日：2020-03-30

    Applicant: DENSO CORPORATION

    Inventor： Koichi Murakawa ,  Shigeki Takahashi ,  Masakiyo Sumitomo

    IPC: H01L27/06 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/739 ,  H01L29/861

    Abstract: In a semiconductor device in which an IGBT region having an IGBT element and an FWD region having an FWD element are formed to a semiconductor substrate, a plurality of carrier injection layers electrically connected with a second electrode and configuring a PN junction with a field stop layer is disposed in a cathode layer. When an impurity concentration of the field stop layer is defined as Nfs [cm−3], and a length of a shortest portion of each of the plurality of carrier injection layers along a planar direction of the semiconductor substrate is defined as L1 [μm], the plurality of carrier injection layers satisfies a relationship of L1>6.8×10−16×Nfs+20.

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10224322B2

    公开(公告)日：2019-03-05

    申请号：US15578318

    申请日：2016-07-22

    Applicant: DENSO CORPORATION

    Inventor： Weitao Cheng ,  Shigeki Takahashi ,  Masakiyo Sumitomo

    IPC: H01L27/06 ,  H01L21/8234 ,  H01L29/739 ,  H01L27/04 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/861 ,  H01L29/40

    Abstract: A semiconductor device includes a diode provided with: a drift layer being a first conductivity type; a cathode region being provided in a back face side of the drift layer and being the first conductivity type; a second conductivity type region provided in a surface layer part of the drift layer; multiple trenches dividing the second conductivity type region into pieces by being provided deeper than the second conductivity type region, and configuring an anode region; a gate insulation film provided in a surface of the trench; a gate electrode provided in a surface of the gate insulation film; an upper electrode electrically connected with the anode region; and a lower electrode electrically connected with the cathode region. A width between the trenches is narrowest in the drift layer is defined as a mesa width. The mesa width is set to be equal to or greater than 0.3 μm.

    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10763345B2

    公开(公告)日：2020-09-01

    申请号：US16393006

    申请日：2019-04-24

    Applicant: DENSO CORPORATION

    Inventor： Koichi Murakawa ,  Masakiyo Sumitomo ,  Shigeki Takahashi

    IPC: H01L29/739 ,  H01L29/861 ,  H01L29/06 ,  H01L27/07 ,  H01L29/10 ,  H01L29/78 ,  H01L29/868

    Abstract: In a semiconductor device, a boundary area is between an IGBT region and a diode region. In other words, the boundary region is at a position adjacent to the diode region. The boundary region has a lower ratio of formation of a high-concentration P-type layer than the IGBT region. Accordingly, during recovery, hole injection from the IGBT region to the diode region can be inhibited. The reduced ratio of formation of the high-concentration P-type layer in the boundary region also reduces the amount of hole injection from the high-concentration P-type layer of the boundary region. Thus, it inhibits an increase in maximum reverse current during the recovery, and also decreases the carrier density on the cathode side to inhibit an increase in tail electrical current, so that the semiconductor device reduces switching loss and is highly resistant to recovery destruction.

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US10748988B2

    公开(公告)日：2020-08-18

    申请号：US16504858

    申请日：2019-07-08

    Applicant: DENSO CORPORATION

    Inventor： Masanori Miyata ,  Shigeki Takahashi ,  Masakiyo Sumitomo ,  Tomofusa Shiga

    IPC: H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/739 ,  H01L29/737 ,  H01L29/66 ,  H01L27/082 ,  H01L29/732 ,  H01L29/423

    Abstract: A semiconductor device has an element part and an outer peripheral part, and a deep layer is formed in the outer peripheral part more deeply than a base layer. When a position of the deep layer closest to the element part is defined as a boundary position, a distance between the boundary position and a position closest to the outer peripheral part in an emitter region is defined as a first distance, and a distance between the boundary position and a position of an end of a collector layer is defined as a second distance, the first distance and the second distance are adjusted such that a carrier density in the outer peripheral part is lowered based on breakdown voltage in the outer peripheral part lowered by the deep layer.

    Lateral insulated gate bipolar transistor
    6.
    发明授权
    Lateral insulated gate bipolar transistor 有权
    横向绝缘栅双极晶体管

    公开(公告)号：US09214536B2

    公开(公告)日：2015-12-15

    申请号：US14077510

    申请日：2013-11-12

    Applicant: DENSO CORPORATION

    Inventor： Shigeki Takahashi ,  Norihito Tokura ,  Satoshi Shiraki ,  Youichi Ashida ,  Akio Nakagawa

    IPC: H01L29/66 ,  H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40

    CPC classification number: H01L29/7393 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/405 ,  H01L29/7394

    Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.

    Abstract translation: 横向绝缘栅双极晶体管包括包括漂移层，集电极区域，沟道层，发射极区域，栅极绝缘层，栅电极，集电极，发射极和阻挡层的半导体衬底。 阻挡层沿着集电极区域的两侧设置，并且位于比通道层的底部更深的深度。 阻挡层的杂质浓度高于漂移层的杂质浓度。 阻挡层具有靠近集电极区域的第一端和远离集电极区域的第二端。 第一端位于沟道层和集电极区之间，第二端位于沟道层的底部。

    Semiconductor device having lateral insulated gate bipolar transistor
    7.
    发明授权
    Semiconductor device having lateral insulated gate bipolar transistor 有权
    具有横向绝缘栅双极晶体管的半导体器件

    公开(公告)号：US08791500B2

    公开(公告)日：2014-07-29

    申请号：US13719389

    申请日：2012-12-19

    Applicant: Denso Corporation

    Inventor： Youichi Ashida ,  Shigeki Takahashi

    IPC: H01L29/74 ,  H01L31/111

    CPC classification number: H01L29/7394 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/405 ,  H01L29/42368 ,  H01L29/47 ,  H01L29/66325 ,  H01L29/7393

    Abstract: A semiconductor device having a lateral insulated gate bipolar transistor includes a first conductivity type drift layer, a second conductivity type collector region formed in a surface portion of the drift layer, a second conductivity type channel layer formed in the surface portion of the drift layer, a first conductivity type emitter region formed in a surface portion of the channel layer, and a hole stopper region formed in the drift layer and located between the collector region and the emitter region. Holes are injected from the collector region into the drift layer and flow toward the emitter region through a hole path. The hole stopper region blocks a flow of the holes and narrows the hole path to concentrate the holes.

    Abstract translation: 具有横向绝缘栅双极晶体管的半导体器件包括第一导电型漂移层，形成在漂移层的表面部分中的第二导电型集电极区，形成在漂移层的表面部分中的第二导电类型沟道层， 形成在沟道层的表面部分中的第一导电型发射极区域和形成在漂移层中并且位于集电极区域和发射极区域之间的空穴停止区域。 孔从集电区域注入漂移层，并通过孔路流向发射极区域。 孔停止区域阻挡孔的流动并使孔径变窄以集中孔。

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