公开(公告)号：US5473329A

公开(公告)日：1995-12-05

申请号：US378788

申请日：1995-01-26

Applicant: Dev V. Gupta ,  Kyung-Yeop Hong

Inventor： Dev V. Gupta ,  Kyung-Yeop Hong

IPC: H04L1/24 ,  H03M5/12

CPC classification number: H04L1/247

Abstract: Loop Performance Monitoring (LPM) for DDS loops is described. Even though DDS loops have Intentional Bipolar Violations (BPVs), a Loop Coding Violations (LCVs) detection strategy based on further processing of BPVs is described. By monitoring LCVs a local loop terminating device can determine Bit Error Rate (BER).A system is described by which an Office Channel Unit (OCU) can process LCV information to determine signal quality of the signal over the incoming local loop. If the signal quality falls below a certain threshold, the OCU can cut the loop off from the DDS circuit and send control codes into the network.A system is also described where a Network Interface Unit (NIU) with the LPM system communicates incoming LCV information to the OCU using low speed signalling over the simplex path between the transmit and receive pairs. The OCU monitors incoming LCVs as well, and thus has the information necessary to determine bi-directional BER performance.

公开(公告)号：US5113391A

公开(公告)日：1992-05-12

申请号：US556010

申请日：1990-07-20

Applicant: Dev V. Gupta ,  Y. Brian Chen ,  Joel T. Tarantino

Inventor： Dev V. Gupta ,  Y. Brian Chen ,  Joel T. Tarantino

IPC: H04J3/04 ,  H04J3/16 ,  H04L12/52

CPC classification number: H04J3/047 ,  H04J3/1647 ,  H04L12/52

Abstract: An Intelligent Channel Unit for interfacing end user stations to a DDS digital data communications network and for processing network and end user data according to digital data communications applications is described. The ICU comprises data processing circuitry consisting of a programmable processing circuitry (PPC), a microprocessor controller, and a memory device; a bypass circuit; three input/output data ports; and interface units for the control, maintenance, and test functions.

Abstract translation: 描述了用于将最终用户站与DDS数字数据通信网络进行接口以及根据数字数据通信应用来处理网络和最终用户数据的智能信道单元。 ICU包括由可编程处理电路（PPC），微处理器控制器和存储器件组成的数据处理电路; 旁路电路; 三个输入/输出数据端口; 以及用于控制，维护和测试功能的接口单元。

公开(公告)号：US5025443A

公开(公告)日：1991-06-18

申请号：US345472

申请日：1989-04-28

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04L25/49 ,  H04M11/06

CPC classification number: H04L25/4925 ,  H04M11/062

Abstract: A method and apparatus is described for transmitting and receiving data signals and voice band signals over a single pair of wires, wherein the energy content of the data signals in the voice band is transferred to a higher frequency to avoid interference between the two. This is accomplished by sinusoidally encoding the data pulses in the frequency domain. The encoding is equivalently performed in the time domain by linearly combining weighted delayed and advanced versions of the data pulses, in accordance with a weighting formula. A transversal filter is used to multiple delayed and advanced versions of the data pulses by a scaling factor times the ratio of m!/m-i)!i! factorial wherein i is the ith version being weighted, m is an integer greater than one and ! indicates the factorial function.

Abstract translation: 描述了一种用于通过单根线对发送和接收数据信号和语音频带信号的方法和装置，其中将语音频带中的数据信号的能量内容传送到更高的频率以避免两者之间的干扰。 这是通过对频域中的数据脉冲进行正弦编码来实现的。 根据加权公式，通过线性组合数据脉冲的加权延迟和高级版本，在时域中等效执行编码。 横向滤波器用于数据脉冲的多个延迟和高级版本，缩放因子乘以m！/ m-i）！i！ 因子其中i是加权的第i个版本，m是大于1的整数， 表示阶乘函数。

公开(公告)号：US4953160A

公开(公告)日：1990-08-28

申请号：US159887

申请日：1988-02-24

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H04L25/49 ,  H04M11/00 ,  H04M11/06

CPC classification number: H04L25/4925 ,  H04M11/062

Abstract: A method and apparatus is described for transmitting and receiving data signals and voice band signals over a single pair of wires, wherein the energy content of the data signals in the voice bands is transferred to a higher frequency to avoid interference between the two. This is accomplished by sinusoidally encoding the data pulses in the frequency domain. The encoding is equivalently performed in the time domain by linearly combining weighted delayed and advanced versions of the data pulses, in accordance with a weighting formula. A transversal filter is used to multiple delayed and advanced versions of the data pulses by a scaling factor times the ratio of m!/(m-i)!i! factorial wherein i is the ith version being weighted, m is an integer greater than one and ! indicates the factorial function.

Abstract translation: 描述了一种用于通过单根线对发送和接收数据信号和语音频带信号的方法和装置，其中语音频带中的数据信号的能量内容被传送到更高的频率以避免两者之间的干扰。 这是通过对频域中的数据脉冲进行正弦编码来实现的。 根据加权公式，通过线性组合数据脉冲的加权延迟和高级版本，在时域中等效执行编码。 横向滤波器用于数据脉冲的多个延迟和高级版本，缩放因子乘以m！/（m-i）！i！ 因子其中i是加权的第i个版本，m是大于1的整数， 表示阶乘函数。

公开(公告)号：US4382300A

公开(公告)日：1983-05-03

申请号：US244881

申请日：1981-03-18

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03M13/15 ,  G06F11/12

CPC classification number: H03M13/15

Abstract: A received cyclic code word is clocked into a first register (11). As soon as the whole received word has been read in, it is parallel-loaded into a storage register (12). The syndrome is then formed (13) of the stored code word. This syndrome is coupled to a logic circuit (14) which determines whether the last stored bit is in error. This decision is modulo-2 added (15) with the last bit, the output being the correct version of the last bit which is then clocked into the input of the storage register. The operation is repeated a given number of times (nt*) at the end of which the maximum likelihood decision on r(x)--the cyclic code word--is present in the storage register (12), ready to be read out.

Abstract translation: 接收到的循环码字被计时到第一寄存器（11）。 一旦读取完整的接收到的字，它就被并行加载到存储寄存器（12）中。 然后形成（13）存储的代码字的综合征。 该校正子耦合到逻辑电路（14），该逻辑电路确定最后存储的位是否存在错误。 该决定与最后一位相加（15）是模2，输出是最后一位的正确版本，然后将其送入存储寄存器的输入。 该操作重复一次给定次数（nt *），其结束时r（x） - 循环码字的最大似然判定存在于存储寄存器（12）中，准备被读出。

公开(公告)号：US08866531B2

公开(公告)日：2014-10-21

申请号：US13576635

申请日：2011-02-11

Applicant: Dev V. Gupta ,  Zhiguo Lai

Inventor： Dev V. Gupta ,  Zhiguo Lai

IPC: G06G7/18 ,  H03F1/22 ,  H03F3/19 ,  H03F3/45 ,  H03H7/24 ,  H03H11/12 ,  H03H11/46

CPC classification number: H03F3/45183 ,  H03F1/223 ,  H03F3/19 ,  H03F3/45188 ,  H03F3/45197 ,  H03F3/45201 ,  H03F2200/264 ,  H03F2200/36 ,  H03F2203/45318 ,  H03F2203/45374 ,  H03F2203/45644 ,  H03F2203/45686 ,  H03F2203/45702 ,  H03H7/24 ,  H03H7/25 ,  H03H7/482 ,  H03H7/487 ,  H03H11/1256 ,  H03H11/53 ,  H03H2210/017 ,  H03H2210/021 ,  H03H2210/028 ,  H03H2210/036 ,  H03H2210/04

Abstract: Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.

Abstract translation: 宽带模拟射频设备可用于为可扩展的模拟信号处理器创建构建块，该处理器的工作频率可达50 MHz至20 GHz或更高。 示例器件包括使用深亚微米CMOS技术实现的积分器（跨导体），数字控制衰减器，缓冲器和可扩展的夏季。 由于器件是用CMOS实现的，所以迹线/器件尺寸与信号波长的比率与印刷电路板中实现的低频器件的比率大致相同。 将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。

公开(公告)号：US20130293308A1

公开(公告)日：2013-11-07

申请号：US13882933

申请日：2011-11-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03F3/21

CPC classification number: H03F3/211 ,  H03F1/3229 ,  H03F3/195 ,  H03F3/245 ,  H03F3/45188 ,  H03F2200/405 ,  H03F2203/45644 ,  H03F2203/45684

Abstract: In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.

Abstract translation: 在一个实施例中，电路包括可变组延迟，其被配置为延迟宽带输入信号以获得延迟的输入信号; 宽带运算放大器，被配置为基于延迟输入信号和线性化功率放大器输出之间的差来确定误差信号; 反馈放大器，被配置为放大所述误差信号以获得放大的误差信号; 以及方向组合器，其被配置为将放大的误差信号与功率放大器输出组合以获得线性化的功率放大器输出。

公开(公告)号：US08527003B2

公开(公告)日：2013-09-03

申请号：US11801421

申请日：2007-05-09

Applicant: Dev V. Gupta ,  Kenneth Wood ,  Abbie Mathew

Inventor： Dev V. Gupta ,  Kenneth Wood ,  Abbie Mathew

IPC: H04B1/38

CPC classification number: H04L25/03834 ,  H01Q1/2291 ,  H01Q9/0428 ,  H01Q13/0241 ,  H01Q15/244

Abstract: A system and apparatus including a wireless network architecture that provides broadband data network coverage over an expandable geographic area. A media access control layer is also provided that facilitates access to the broadband wireless network. A high-frequency wireless modem enables high data rate access to the wireless network in a spectrally-efficient manner using SSB modulation. A wideband millimeter-wave antenna includes a cosecant-squared reflector enabling signal propagation between network elements thereby enabling seamless wireless communications. A millimeter-wave polarizer, and a septum polarizer each convert between linear and circular polarization. A cross-shaped horn antenna adapted for circularly polarized signals can also be used in combination with the septum polarizer. A combined horn antenna is fed using a microstrip patch antenna.

Abstract translation: 一种包括在可扩展地理区域上提供宽带数据网络覆盖的无线网络架构的系统和装置。 还提供了便于接入宽带无线网络的媒体接入控制层。 高频无线调制解调器可以使用SSB调制以频谱有效的方式实现对无线网络的高数据速率接入。 宽带毫米波天线包括能够在网络元件之间进行信号传播的均方反射器，从而实现无缝无线通信。 毫米波偏振器和隔膜偏振器各自在线性和圆偏振之间转换。 适用于圆偏振信号的十字形喇叭天线也可以与隔膜偏振器组合使用。 使用微带贴片天线馈送组合喇叭天线。

公开(公告)号：US5099473A

公开(公告)日：1992-03-24

申请号：US556008

申请日：1990-07-20

Applicant: Dev V. Gupta ,  Y. Brian Chen ,  Keven Stiffler

Inventor： Dev V. Gupta ,  Y. Brian Chen ,  Keven Stiffler

IPC: H04L12/56

CPC classification number: H04L12/56

Abstract: A port concentrator communication system which allows a large number of end user stations to share a limited number of trunk lines to a packet switch network is described. Specifically, the system comprises a number of end user stations each coupled to a port concentration intelligent unit, with these units being coupled together in cascade fashion and the end unit in the cascade being coupled to a set of trunk lines leading to a packet switch network. Each of the trunk line ports corresponds to a channel in the DDS DSOB data streams network and in the reverse direction to the set of end user stations. Special code bytes, indicating the status of trunk line ports, appear in the DSOB data streams and play an integral role in the method whereby the port concentration intelligent units associated with the end user stations can request, obtain access to and communicate over, and relinquish trunk lines.

Abstract translation: 描述允许大量终端用户站共享有限数量的中继线到分组交换网络的端口集中器通信系统。 具体地，该系统包括多个终端用户站，每个终端用户站分别耦合到端口集中智能单元，其中这些单元以级联的方式耦合在一起，而级联中的终端单元耦合到一组中继线，通过分组交换网络 。 每个中继线端口对应于DDS DSOB数据流网络中的信道，并且与该组终端用户站相反。 指示中继线端口的状态的特殊代码字节出现在DSOB数据流中，并且在与最终用户站相关联的端口集中智能单元可以请求，获取和通信并放弃的方法中发挥不可或缺的作用 干线。

公开(公告)号：US08970252B2

公开(公告)日：2015-03-03

申请号：US13883597

申请日：2011-11-01

Applicant: Dev V. Gupta

Inventor： Dev V. Gupta

IPC: H03K19/177

CPC classification number: H03K19/177

Abstract: In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable attenuator and at least one variable integrator configured to operate on a wideband analog signal; and a summer configured to add outputs from the state variable filter engines.

Abstract translation: 在一个实施例中，现场可编程模拟阵列（FPAA）包括并联布置的状态变量滤波器引擎，每个状态变量滤波器引擎包括至少一个可变衰减器和至少一个可变积分器，其被配置为在宽带模拟信号上操作; 以及一个加法器，用于添加来自状态变量过滤器引擎的输出。