公开(公告)号：US20060222004A1

公开(公告)日：2006-10-05

申请号：US11097735

申请日：2005-04-01

申请人： Bruce Beukema ,  Lance Hehenberger ,  Nathaniel Sellin ,  Robert Shearer ,  Bruce Walk

发明人： Bruce Beukema ,  Lance Hehenberger ,  Nathaniel Sellin ,  Robert Shearer ,  Bruce Walk

IPC分类号： H04L12/28

CPC分类号： H04L69/18

摘要： In a first aspect, a first method is provided for transferring data using an Infiniband (IB) protocol. The first method includes the steps of (1) receiving a non-IB packet having header data and payload data at a first node of a computer system; and (2) modifying data in the non-IB packet to convert the non-IB packet to an IB packet having header data and payload data. The header data of the non-IB packet is not included in the payload data of the IB packet resulting from the conversion. Numerous other aspects are provided.

摘要翻译： 在第一方面，提供了使用Infiniband（IB）协议传送数据的第一种方法。 第一种方法包括以下步骤：（1）在计算机系统的第一节点处接收具有报头数据和有效载荷数据的非IB分组; 和（2）修改非IB分组中的数据以将非IB分组转换为具有报头数据和有效载荷数据的IB分组。 非IB分组的报头数据不包括在由转换产生的IB分组的有效载荷数据中。 提供了许多其他方面。

公开(公告)号：US20060140122A1

公开(公告)日：2006-06-29

申请号：US11023707

申请日：2004-12-28

申请人： Robert Shearer ,  Martha Voytovich

发明人： Robert Shearer ,  Martha Voytovich

IPC分类号： H04L1/00

CPC分类号： H04L1/1874

摘要： Methods and apparatus that allow lost packets on one virtual channel to be retried without requiring all subsequently issued packets, sent over other virtual channels, to be retried. In other words, packet retries may be performed on a “per virtual channel” basis. As a result, other virtual channels, not experiencing lost packets, may not suffer reductions in their bandwidth due to a lost packet occurring on another virtual channel.

摘要翻译： 允许重试在一个虚拟通道上丢失分组的方法和装置，而不需要在其他虚拟通道上发送的所有随后发出的分组重新尝试。 换句话说，分组重试可以在“每个虚拟通道”的基础上执行。 结果，由于在另一个虚拟通道上发生丢失的分组，其他虚拟通道不会遇到丢失的数据包，可能不会降低其带宽。

公开(公告)号：US20060092842A1

公开(公告)日：2006-05-04

申请号：US10981063

申请日：2004-11-04

申请人： Bruce Beukema ,  Mark Hickey ,  Robert Shearer

发明人： Bruce Beukema ,  Mark Hickey ,  Robert Shearer

IPC分类号： H04L12/26

CPC分类号： H04L47/10 ,  H04L47/30 ,  H04L47/39

摘要： Embodiments of the present invention provide methods, a module, and a system for calculating a credit limit for an interface capable of receiving multiple packets simultaneously. Generally, the multiple packets are simultaneously received at an interface on the second device, each packet being one of a plurality of packet types, and a flow control credit limit to be transmitted to the first device is adjusted based on the combination of packet types of the simultaneously received packets.

摘要翻译： 本发明的实施例提供了用于计算能够同时接收多个分组的接口的信用限额的方法，模块和系统。 通常，在第二设备的接口处同时接收多个分组，每个分组是多个分组类型之一，并且基于分组类型的组合来调整要发送到第一设备的流控制信用限制 同时接收的数据包。

公开(公告)号：US20060072625A1

公开(公告)日：2006-04-06

申请号：US10948777

申请日：2004-09-23

申请人： Robert Shearer ,  Craig Wigglesworth

发明人： Robert Shearer ,  Craig Wigglesworth

IPC分类号： H04J3/06

CPC分类号： G06F13/4282 ,  G06F2213/0038 ,  H04L7/005 ,  H04L27/0014 ,  H04L2027/0073

摘要： Methods and apparatus that may be utilized in an effort to ensure bytes of data sequentially received on multiple single-byte data paths with properly aligned when presented on a multi-byte interface are provided. A sufficient number of bytes received each channel may be stored (e.g., buffered) and examined to properly match data from each single-byte path. Once matched, the data may be output in a proper order on the multi-byte interface, for example, via some type of multiplexor arrangement.

公开(公告)号：US20060026358A1

公开(公告)日：2006-02-02

申请号：US10901600

申请日：2004-07-29

申请人： Bruce Beukema ,  Jon Kriegel ,  Jamie Kuesel ,  Eric Mejdrich ,  Robert Shearer ,  Bruce Walk

发明人： Bruce Beukema ,  Jon Kriegel ,  Jamie Kuesel ,  Eric Mejdrich ,  Robert Shearer ,  Bruce Walk

IPC分类号： G06F12/00

CPC分类号： G06F12/0888

摘要： Computer systems with direct updating of cache (e.g., primary L1 cache) memories of a processor, such as a central processing unit (CPU) or graphics processing unit (GPU). Special addresses are reserved for high speed memory. Memory access requests involving these reserved addresses are routed directly to the high speed memory. Memory access requests not involving these reserved addresses are routed to memory external to the processor.

摘要翻译： 具有直接更新诸如中央处理单元（CPU）或图形处理单元（GPU）的处理器的高速缓存（例如，主要L1高速缓存）存储器的计算机系统。 专用地址保留给高速存储器。 涉及这些保留地址的存储器访问请求直接路由到高速存储器。 不涉及这些保留地址的存储器访问请求被路由到处理器外部的存储器。

公开(公告)号：US20050199174A1

公开(公告)日：2005-09-15

申请号：US10973982

申请日：2004-10-27

申请人： Robert Shearer ,  Pat Madden

发明人： Robert Shearer ,  Pat Madden

IPC分类号： B63B17/00

CPC分类号： B63B17/02 ,  B60J7/104 ,  B63B2221/12

摘要： An enclosure is removably securable to a support member including a first part of a releasable fastener. The enclosure includes a panel of material sized to enclose the support member. A flexible flap is affixed to the panel, and a second part of the releasable fastener is affixed to the flexible flap. The second part of the releasable fastener is positioned for engagement with the first part when the panel encloses the support member. By affixing the second part of the releasable fastener to the flexible flap, the position of the fastener is adjustable to accommodate panel shrinkage, manufacturing tolerances and the like.

摘要翻译： 外壳可拆卸地固定到包括可释放紧固件的第一部分的支撑构件上。 外壳包括尺寸适于包围支撑构件的材料面板。 柔性翼片固定在面板上，可释放紧固件的第二部分固定在柔性翼片上。 可拆卸紧固件的第二部分定位成当面板包围支撑构件时与第一部分接合。 通过将可释放紧固件的第二部分固定到柔性翼片上，紧固件的位置是可调节的，以适应面板收缩率，制造公差等。

公开(公告)号：US4061521A

公开(公告)日：1977-12-06

申请号：US706433

申请日：1976-07-19

申请人： Stanley Lerner ,  Robert Shearer

发明人： Stanley Lerner ,  Robert Shearer

IPC分类号： G09F5/04 ,  B29C69/00 ,  B31B1/90 ,  B44D3/00 ,  B32B31/00

CPC分类号： B44D3/003 ,  B29C69/006 ,  B31B2201/9019 ,  Y10T156/1077 ,  Y10T156/1339 ,  Y10T156/1756 ,  Y10T428/24736

摘要： A method and apparatus are disclosed for the manufacture of a colored chip or colored swatch bearing sheet, i.e. a color chart, comprising a base sheet bearing an array of adhesively attached colored chips in rows with indicia identifying the color of each chip with a particular paint. The base sheets are fed automatically from a stack of sheets to an adhesive applying means which applies spots of adhesive to the sheet at swatch receiving areas on the sheet. Narrow webs or ribbons of swatch material are severed to form the individual swatches or color chips which then are transferred automatically to a passing sheet and applied thereto. The sheets pass through a series of swatch forming and applying stations with a row of swatches being applied to each sheet at each of the respective stations. Preferably, the sheets are fed continuously and at a relativey fast rate of speed. The arrangement and size of the swatches may be easily changed to allow the apparatus to be used for various types of color charts.

摘要翻译： 公开了用于制造彩色芯片或彩色样片支承片材的方法和装置，即彩色图表，其包括基片，该基片承载具有粘附附着的彩色芯片阵列，其中标记用特定涂料识别每个芯片的颜色 。 基片被自动地从一堆片材馈送到粘合剂施加装置，其在片材上的样片接收区域处将片状粘合剂施加到片材。 切片的狭窄幅材或色带被切断以形成单独的色板或彩色芯片，然后将其自动转印到通过的纸张上并将其施加到其上。 纸张通过一系列样板形成和施加工位，其中在各个站的每一个处，将一排色板施加到每张纸上。 优选地，纸张以相对快的速度连续地进给。 可以容易地改变色板的布置和尺寸，以允许该装置用于各种类型的色图。

公开(公告)号：US20080071499A1

公开(公告)日：2008-03-20

申请号：US11947636

申请日：2007-11-29

申请人： Thomas Armstead ,  Lance Meyer ,  Paul Schardt ,  Robert Shearer

发明人： Thomas Armstead ,  Lance Meyer ,  Paul Schardt ,  Robert Shearer

IPC分类号： G06F15/00

CPC分类号： G06F11/3414 ,  G06F11/3452 ,  G06F11/3476 ,  G06F11/349 ,  G06F2201/86 ,  H04L43/16

摘要： A method and apparatus that allow packet based communication transactions between devices over an interconnect bus to be captured to measure performance. Performance metrics may be determined by capturing events at various locations as they pass through the system. Performance may be verified at run time by computing performance metrics for captured events and comparing such metrics to predefined performance ranges and/or self learned performance ranges. Furthermore, embodiments of the present invention provide for dynamic tailoring of bus traffic to generate potential failing conditions. For some embodiments, performance verification as described herein may be performed in a simulation environment.

公开(公告)号：US20070234191A1

公开(公告)日：2007-10-04

申请号：US11757176

申请日：2007-06-01

申请人： Mark Hickey ,  Robert Shearer

发明人： Mark Hickey ,  Robert Shearer

IPC分类号： G06F11/08

CPC分类号： H03M13/091 ,  H03M13/6516

摘要： In a first aspect, a first method is provided. The first method includes the steps of (1) transmitting data on a bus, wherein data is presented on the bus using varying widths; (2) configuring a cyclic redundancy check (CRC) to be performed on the data based on the manner in which the data is presented on the bus; and (3) performing the CRC on the data. Numerous other aspects are provided.

摘要翻译： 在第一方面，提供了第一种方法。 第一种方法包括以下步骤：（1）在总线上传输数据，其中使用变化的宽度在总线上呈现数据; （2）基于在总线上呈现数据的方式来配置对数据执行的循环冗余校验（CRC）; 和（3）对数据执行CRC。 提供了许多其他方面。

公开(公告)号：US20060136801A1

公开(公告)日：2006-06-22

申请号：US11016217

申请日：2004-12-17

申请人： Mark Hickey ,  Robert Shearer

发明人： Mark Hickey ,  Robert Shearer

IPC分类号： H03M13/00

CPC分类号： H03M13/091 ,  H03M13/6516

摘要： In a first aspect, a first method is provided. The first method includes the steps of (1) transmitting data on a bus, wherein data is presented on the bus using varying widths; (2) configuring a cyclic redundancy check (CRC) to be performed on the data based on the manner in which the data is presented on the bus; and (3) performing the CRC on the data. Numerous other aspects are provided.

摘要翻译： 在第一方面，提供了第一种方法。 第一种方法包括以下步骤：（1）在总线上传输数据，其中使用变化的宽度在总线上呈现数据; （2）基于在总线上呈现数据的方式来配置对数据执行的循环冗余校验（CRC）; 和（3）对数据执行CRC。 提供了许多其他方面。